公开(公告)号：GB2364170B

公开(公告)日：2002-06-12

申请号：GB0030319

申请日：2000-12-12

Applicant: LUCENT TECHNOLOGIES INC

Inventor： CHITTIPEDDI SAILESH ,  COCHRAN WILLIAM THOMAS ,  SMOOHA YEHUDA

IPC: H01L23/52 ,  H01L21/3205 ,  H01L21/60 ,  H01L21/768 ,  H01L23/485 ,  H01L23/532

Abstract: A dual damascene bond pad (27) resistant to stress effects within an integrated circuit is disclosed, allowing for the bond pad (27) to be formed over a substrate (1) containing active circuitry. The dual damascene structure is created by forming bond pad opening (20) and vias (19) in region (40), and depositing metal film (17) in the opening (20) and vias (19). The opening has barrier layer film (13) on bottom surface of opening (20) and vias (19) extending downwardly through barrier layer film (13) and lower dielectric film (11). A conductive layer (5) may be interposed between substrate region (1) and lower dielectric film (11). The reduction in stress of bond pad (27) results in the pad (27) being more resistant to cracking when an external wire (25) is attached to the pad (27), thus preventing leakage currents between the bond pad (27) and any underlying circuitry.

公开(公告)号：GB2364170A

公开(公告)日：2002-01-16

申请号：GB0030319

申请日：2000-12-12

Applicant: LUCENT TECHNOLOGIES INC

Inventor： CHITTIPEDDI SAILESH ,  COCHRAN WILLIAM THOMAS ,  SMOOHA YEHUDA

IPC: H01L23/52 ,  H01L21/3205 ,  H01L21/60 ,  H01L21/768 ,  H01L23/485 ,  H01L23/532

Abstract: A dual damascene bond pad (27) resistant to stress effects within an integrated circuit is disclosed, allowing for the bond pad (27) to be formed over a substrate (1) containing active circuitry. The dual damascene structure is created by forming bond pad opening (20) and vias (19) in region (40), and depositing metal film (17) in the opening (20) and vias (19). The opening has barrier layer film (13) on bottom surface of opening (20) and vias (19) extending downwardly through barrier layer film (13) and lower dielectric film (11). A conductive layer (5) may be interposed between substrate region (1) and lower dielectric film (11). The reduction in stress of bond pad (27) results in the pad (27) being more resistant to cracking when an external wire (25) is attached to the pad (27), thus preventing leakage currents between the bond pad (27) and any underlying circuitry.