公开(公告)号：JPH02179416A

公开(公告)日：1990-07-12

申请号：JP27698189

申请日：1989-10-24

Applicant: MARELLI AUTRONICA

Inventor： DEIEGO RAZAANIYA ,  FURANSESUKO SEMERARO

IPC: G01B7/30 ,  G01B7/00 ,  G01D5/244 ,  G01D5/245 ,  G01R19/175 ,  H03K5/1536

Abstract: PURPOSE: To detect a low peak signal by providing a circuit for resetting an accumulation means so that the means reaches 0 every time when a signal generated by a sensor exceeds a threshold signal. CONSTITUTION: When a rotor 2 rotates, a voltage signal Vi is outputted from a pickup 4 every time when a gear 3 passes the front of the pickup 4, and the signal Vi is supplied to a clamp circuit 6 via a resistor 5. Then, an output signal Ve from the circuit 6 is inputted to a threshold comparison circuit 7 and a threshold signal generation circuit 8. A threshold signal Vs is outputted to the comparator 7 from the circuit 8. In the comparator 7, its output signal Vo is changed from high to low levels when the signal Ve exceeds a signal Vs. The signal Vo operates a monostable circuit 14, and the circuit 14 switches a switch 12 into conduction state for a predetermined time. Therefore, a capacitor 11 momentarily discharges through the switch 12. Then, when the characteristic time of the circuit 14 passes, the switch 12 is changed to a nonconduction state, and the capacitor 11 is charged to a new peak voltage of the signal Ve.

公开(公告)号：JPS63295862A

公开(公告)日：1988-12-02

申请号：JP4570688

申请日：1988-02-26

Applicant: MARELLI AUTRONICA

Inventor： DEIEGO RAZAANIYA ,  FURANCHIESUKO PAORO MANDAARA

IPC: F02P3/045

公开(公告)号：JPH02179415A

公开(公告)日：1990-07-12

申请号：JP27698089

申请日：1989-10-24

Applicant: MARELLI AUTRONICA

Inventor： DEIEGO RAZAANIYA ,  FURANCHIESUKO PAORO MANDAARA

IPC: G01P3/481 ,  G01D5/244 ,  G01D5/245 ,  G01R19/175 ,  H03K5/08 ,  H03K5/1536

Abstract: PURPOSE: To improve reliability by providing a comparison circuit for comparing a signal that is generated by an integration circuit with a threshold signal. CONSTITUTION: When the gear of a rotor W passes the front of a pickup device P, a signal that is generated by the device P is integrated by an integration circuit 4 and its output signal Vi is inputted to the input terminal of a peak detector 9. In this state, a switch 11 is in nonconduction state so that a capacitor 10 is charged by a peak voltage due to the signal Vi. Therefore, with a threshold signal V2 that is supplied to a comparator 7 by a voltage divider 13, its amplitude is proportional to a peak value that is reached by the integration of a signal that is supplied by the device P. When the signal Vi exceeds the level of a signal V2 , the comparator 7 supplies an output signal to a logic circuit 14, thus enabling a signal Vc to be inputted. Also, an output from the comparator 7 starts a monostable circuit 12, switches the switch 11 to a conduction state for a specific time, and rapidly discharges the capacitor 10. After that, the switch 11 returns to a nonconduction state, and the capacitor 10 is charged to a new peak voltage of the signal Vi.