SPACE EFFICIENT HIGH-VOLTAGE TERMINATION AND PROCESS FOR FABRICATING THE SAME

    公开(公告)号:WO2020247013A1

    公开(公告)日:2020-12-10

    申请号:PCT/US2019/061857

    申请日:2019-11-15

    Abstract: A high-voltage termination for a semiconductor device includes a substrate, an implanted device region, a shallow trench adjacent to the implanted device region, and a doped extension region between the implanted device region and a first edge of the shallow trench adjacent to the implanted device region. A junction termination extension region is formed in the shallow trench contacting the extension region and extending past a second edge of the shallow trench opposite the implanted device region. An insulating layer is formed over at least a portion of the extension region and over the junction termination extension region. A metal layer is formed over the insulating layer.

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