METHODS FOR ELECTROCHEMICALLY FABRICATING STRUCTURES USING ADHERED MASKS, INCORPORATING DIELECTRIC SHEETS, AND/OR SEED LAYERS THAT ARE PARTIALLY REMOVED VIA PLANARIZATION
    1.
    发明申请
    METHODS FOR ELECTROCHEMICALLY FABRICATING STRUCTURES USING ADHERED MASKS, INCORPORATING DIELECTRIC SHEETS, AND/OR SEED LAYERS THAT ARE PARTIALLY REMOVED VIA PLANARIZATION 审中-公开
    使用附加掩模,合并电介质片和/或通过平面化部分去除的种子层的电化学结构的方法

    公开(公告)号:WO2004101856A3

    公开(公告)日:2005-07-14

    申请号:PCT/US2004014300

    申请日:2004-05-07

    Abstract: Embodiments of the present invention provide mesoscale or microscale three-dimensional structures (e.g. components, device, and the like). Embodiments relate to one or more of (1) the formation of such structures which incorporate sheets of dielectric material and/or wherein seed layer material (1226) used to allow electrodeposition (1228) over dielectric material (1224) is removed via planarization operations; (2) the formation of such structures wherein masks used for at least some selective patterning operations are obtained through transfer plating of masking material to a surface of a substrate or previously formed layer, and/or (3) the formation of such structures wherein masks (1224) used for forming at least portions of some layers are patterned on the build surface directly from data representing the mask configuration, e.g. in some embodiments mask patterning is achieved by selectively dispensing material via a computer controlled inkjet nozzle or array or via a computer controlled extrusion device.

    Abstract translation: 本发明的实施例提供中尺度或微尺寸的三维结构(例如部件,装置等)。 实施例涉及以下一个或多个(1)形成这样的结构,其中结合有介电材料片和/或其中通过平面化操作去除用于允许通过电介质材料(1224)的电沉积(1228)的种子层材料(1226) (2)形成这样的结构,其中用于至少一些选择性图案化操作的掩模通过将掩模材料转移到衬底或先前形成的层的表面获得,和/或(3)形成这样的结构,其中掩模 用于形成一些层的至少部分的(1224)直接从表示掩模配置的数据在构建表面上图案化,例如 在一些实施例中,通过经由计算机控制的喷墨喷嘴或阵列或经由计算机控制的挤出装置选择性地分配材料来实现掩模图案化。

    MICROPROBE TIPS AND METHODS FOR MAKING
    2.
    发明申请
    MICROPROBE TIPS AND METHODS FOR MAKING 审中-公开
    MICROPROBE提示和制作方法

    公开(公告)号:WO2005065431A3

    公开(公告)日:2005-12-08

    申请号:PCT/US2005000301

    申请日:2005-01-03

    CPC classification number: G01R3/00

    Abstract: Embodiments of the present invention are directed to the formation of microprobe tips elements (164) having a variety of configurations. In some embodiments tips (164) are formed from the same building material as the probes themselves, while in other embodiments the tips (164) may be formed from a different material and/or may include a coating material (508). In some embodiments, the tips (164) are formed before the main portions of the probes and the tips (164) are formed in proximity to or in contact with a temporary substrate (152). Probe tip patterning may occur in a variety of different ways, including, for example, via molding in patterned holes that have been isotropically or anisotropically etched silicon, via molding in voids formed in over exposed photoresist, via molding in voids in a sacrificial material that have formed as a result of the sacrificial material mushrooming over carefully sized and located regions of dielectric material, via isotropic etching of a the tip material around carefully sized placed etching shields, via hot pressing, and the like.

    Abstract translation: 本发明的实施例涉及形成具有各种构造的微探针尖元件(164)。 在一些实施例中,尖端(164)由与探针本身相同的建筑材料形成,而在其它实施例中,尖端(164)可由不同材料形成和/或可包括涂层材料(508)。 在一些实施例中,尖端(164)形成在探针的主要部分之前,并且尖端(164)形成在临时衬底(152)附近或与其接触。 探针尖端图案化可以以各种不同的方式发生,包括例如通过在各向异性或各向异性地蚀刻硅的图案化孔中模制,通过在暴露在光致抗蚀剂中的空隙中模制,通过在牺牲材料中的空隙中模制, 由于牺牲材料在电介质材料的精细尺寸和定位的区域上的形成,通过各种各向同性的蚀刻尖端材料,围绕小心尺寸放置的蚀刻屏蔽件,通过热压等形成。

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