公开(公告)号：WO1998006103A1

公开(公告)日：1998-02-12

申请号：PCT/US1997013775

申请日：1997-08-06

Applicant: MICRON TECHNOLOGY, INC.

Inventor： MICRON TECHNOLOGY, INC. ,  BEFFA, Ray

IPC: G11C29/00

CPC classification number: G11C29/08 ,  G01R31/318371 ,  G01R31/319 ,  G06F11/006 ,  G11C29/10 ,  G11C29/26 ,  G11C29/44

Abstract: A method and apparatus for testing semiconductor memory chips, such as DRAMs, having a plurality of memory cells or bits. Each memory chip has a unique identifier stored in a database. Tests are performed on the memory chips and when a memory chip fails a test, the memory chip is placed in a repair bin and a test identifier is stored in the database in association with the memory chip identifier. In order to repair the memory chip, failed tests are read out of the database and such tests are again performed on the failed memory chip in order to determine which memory cell in the memory chip is faulty. The failed memory cells are then repaired.

Abstract translation: 一种用于测试诸如DRAM的半导体存储器芯片的方法和装置，其具有多个存储单元或位。 每个存储器芯片具有存储在数据库中的唯一标识符。 对存储器芯片进行测试，并且当存储器芯片未通过测试时，将存储器芯片放置在修理槽中，并且与存储器芯片标识符相关联地将测试标识符存储在数据库中。 为了修复存储器芯片，从数据库中读出失败的测试，并且在故障存储器芯片上再次执行这样的测试，以便确定存储器芯片中的哪个存储器单元是有故障的。 然后修复失败的内存单元。

公开(公告)号：EP0978125B1

公开(公告)日：2002-02-13

申请号：EP97937115.0

申请日：1997-08-06

Applicant: Micron Technology, Inc.

Inventor： BEFFA, Ray

IPC: G11C29/00 ,  G06F11/263

CPC classification number: G11C29/08 ,  G01R31/318371 ,  G01R31/319 ,  G06F11/006 ,  G11C29/10 ,  G11C29/26 ,  G11C29/44

Abstract: A method and apparatus for testing semiconductor memory chips, such as DRAMs, having a plurality of memory cells or bits. Each memory chip has a unique identifier stored in a database. Tests are performed on the memory chips and when a memory chip fails a test, the memory chip is placed in a repair bin and a test identifier is stored in the database in association with the memory chip identifier. In order to repair the memory chip, failed tests are read out of the database and such tests are again performed on the failed memory chip in order to determine which memory cell in the memory chip is faulty. The failed memory cells are then repaired.

公开(公告)号：EP0978125A1

公开(公告)日：2000-02-09

申请号：EP97937115.0

申请日：1997-08-06

Applicant: Micron Technology, Inc.

Inventor： BEFFA, Ray

IPC: G11C29/00 ,  G06F11/263

CPC classification number: G11C29/08 ,  G01R31/318371 ,  G01R31/319 ,  G06F11/006 ,  G11C29/10 ,  G11C29/26 ,  G11C29/44

Abstract: A method and apparatus for testing semiconductor memory chips, such as DRAMs, having a plurality of memory cells or bits. Each memory chip has a unique identifier stored in a database. Tests are performed on the memory chips and when a memory chip fails a test, the memory chip is placed in a repair bin and a test identifier is stored in the database in association with the memory chip identifier. In order to repair the memory chip, failed tests are read out of the database and such tests are again performed on the failed memory chip in order to determine which memory cell in the memory chip is faulty. The failed memory cells are then repaired.