公开(公告)号：WO1998031100A1

公开(公告)日：1998-07-16

申请号：PCT/US1997022767

申请日：1997-12-16

Applicant: MICRON TECHNOLOGY, INC.

Inventor： MICRON TECHNOLOGY, INC. ,  SCHICHT, Steve

IPC: H03K19/0185

CPC classification number: G11C11/4091

Abstract: An input/output device for use with an array of memory cells (12) having a digitline (BL) and a complement of the digitline (BL*) running through the array is fabricated on a substrate (58) having active areas formed therein. Sensing transistors (40, 40') have terminals fabricated in the active areas which are responsive to the digitline (BL) and the complement of the digitline (BL*) for sensing signals thereon in a read operation. Switching transistors (24, 24') have terminals fabricated in the active areas which are responsive to the sensing transistors for selectively conducting the signals sensed by the sensing transistors. Certain terminals of the sensing transistors (40, 40') and certain terminals of the switching transistors (24, 24') are fabricated in the same active area.

Abstract translation: 在具有形成在其中的有效区域的基板（58）上制造用于与具有数字线（BL）和数字线（BL *）的互补的阵列的存储单元阵列一起使用的输入/输出装置。 感测晶体管（40,40'）具有制造在有效区域中的终端，其响应于数字线（BL）和数字线（BL *）的补码，用于在读取操作中感测信号。 开关晶体管（24,24'）具有制造在有源区域中的端子，其响应于感测晶体管，用于选择性地传导由感测晶体管感测的信号。 感测晶体管（40,40'）的某些端子和开关晶体管（24,24'）的某些端子被制造在相同的有源区域中。