公开(公告)号：EP3140748A4

公开(公告)日：2018-01-03

申请号：EP15789012

申请日：2015-05-01

Applicant: MICRON TECHNOLOGY INC

Inventor： LEIDEL JOHN D

IPC: G06F13/16 ,  G06F12/00 ,  G06F13/40

CPC classification number: G06F3/0607 ,  G06F3/0659 ,  G06F3/0685 ,  G06F13/1621 ,  G06F13/1657 ,  G06F13/1673 ,  G06F13/1684 ,  G06F13/40 ,  G06F13/4022 ,  G06F13/4234 ,  G06F2212/205 ,  G11C7/1075 ,  G11C21/00

Abstract: System on a Chip (SoC) devices include two packetized memory buses for conveying local memory packets and system interconnect packets. In an in-situ configuration of a data processing system two or more SoCs are coupled with one or more hybrid memory cubes (HMCs). The memory packets enable communication with local HMCs in a given SoC's memory domain. The system interconnect packets enable communication between SoCs and communication between memory domains. In a dedicated routing configuration each SoC in a system has its own memory domain to address local HMCs and a separate system interconnect domain to address HMC hubs, HMC memory devices, or other SoC devices connected in the system interconnect domain.

公开(公告)号：EP3152665A4

公开(公告)日：2018-01-24

申请号：EP15803929

申请日：2015-05-29

Applicant: MICRON TECHNOLOGY INC

Inventor： LEIDEL JOHN D ,  WHEELER KYLE B

IPC: G06F12/02 ,  G06F12/06

CPC classification number: G06F12/1009 ,  G06F8/441 ,  G06F9/445 ,  G06F12/02 ,  G06F12/10 ,  G06F2212/657

Abstract: The present disclosure includes apparatuses and methods related to virtual address tables. An example method comprises generating an object file that comprises: an instruction comprising a number of arguments; and an address table comprising a number of indexed address elements. Each one of the number of indexed address elements can correspond to a virtual address of a respective one of the number of arguments, wherein the address table can serves as a target for the number of arguments. The method can include storing the object file in a memory.