公开(公告)号：WO2015187609A3

公开(公告)日：2017-04-06

申请号：PCT/US2015033655

申请日：2015-06-02

Applicant: MICRON TECHNOLOGY INC

Inventor： WHEELER KYLE B ,  MANNING TROY A ,  MURPHY RICHARD C

IPC: G11C7/06 ,  G11C7/10

CPC classification number: G11C11/4091 ,  G11C7/065 ,  G11C7/1006 ,  G11C7/1012 ,  G11C11/4087 ,  G11C11/4093 ,  G11C11/4096

Abstract: One example of the present disclosure includes performing a comparison operation in memory using a logical representation of a first value stored in a first portion of a number of memory cells coupled to a sense line of a memory array and a logical representation of a second value stored in a second portion of the number of memory cells coupled to the sense line of the memory array. The comparison operation compares the first value to the second value, and the method can include storing a logical representation of a result of the comparison operation in a third portion of the number of memory cells coupled to the sense line of the memory array.

Abstract translation: 本公开的一个示例包括使用存储在耦合到存储器阵列的感测线的多个存储器单元的第一部分中的第一值的逻辑表示和存储的第二值的逻辑表示来在存储器中执行比较操作 在耦合到存储器阵列的感测线的存储器单元的数量的第二部分中。 比较操作将第一值与第二值进行比较，并且该方法可以包括将比较操作的结果的逻辑表示存储在耦合到存储器阵列的感测线的存储器单元的数量的第三部分中。

公开(公告)号：EP3243137A4

公开(公告)日：2018-08-01

申请号：EP16735388

申请日：2016-01-07

Applicant: MICRON TECHNOLOGY INC

Inventor： WHEELER KYLE B ,  MURPHY RICHARD C ,  MANNING TROY A ,  KLEIN DEAN A

IPC: G06F12/02 ,  G06F9/30 ,  G06F9/38 ,  G06F15/78 ,  G11C7/06 ,  G11C7/10

CPC classification number: G06F9/3877 ,  G06F15/7821 ,  G11C7/06 ,  G11C7/065 ,  G11C7/1006 ,  G11C7/1036 ,  G11C11/4087 ,  G11C11/4096

Abstract: Examples of the present disclosure provide apparatuses and methods related to generating and executing a control flow. An example apparatus can include a first device configured to generate control flow instructions, and a second device including an array of memory cells, an execution unit to execute the control flow instructions, and a controller configured to control an execution of the control flow instructions on data stored in the array.

公开(公告)号：EP3195315A4

公开(公告)日：2018-03-21

申请号：EP15838692

申请日：2015-09-03

Applicant: MICRON TECHNOLOGY INC

Inventor： WHEELER KYLE B

IPC: G11C7/06 ,  G06F1/32 ,  G06F9/30 ,  G06F12/02 ,  G11C7/10 ,  G11C7/12 ,  G11C7/22 ,  G11C11/4076 ,  G11C11/4091

CPC classification number: G06F12/0246 ,  G06F1/3275 ,  G06F9/30032 ,  G06F9/3004 ,  G06F12/0207 ,  G11C7/065 ,  G11C7/1006 ,  G11C7/1009 ,  G11C7/12 ,  G11C7/22 ,  G11C11/4076 ,  G11C11/4091 ,  Y02D10/14

Abstract: Examples of the present disclosure provide apparatuses and methods related to performing swap operations in a memory. An example apparatus might include a first group of memory cells coupled to a first sense line and configured to store a first element. An example apparatus might also include a second group of memory cells coupled to a second sense line and configured to store a second element. An example apparatus might also include a controller configured to cause the first element to be stored in the second group of memory cells and the second element to be stored in the first group of memory cells by controlling sensing circuitry to perform a number operations without transferring data via an input/output (I/O) line.

公开(公告)号：EP3167448A4

公开(公告)日：2018-03-21

申请号：EP15802782

申请日：2015-06-02

Applicant: MICRON TECHNOLOGY INC

Inventor： WHEELER KYLE B ,  MANNING TROY A ,  MURPHY RICHARD C

IPC: G11C7/06 ,  G11C7/10 ,  G11C11/4076 ,  G11C11/4091

CPC classification number: G11C11/4091 ,  G11C7/065 ,  G11C7/1006 ,  G11C7/1012 ,  G11C11/4076 ,  G11C11/4087 ,  G11C11/4093 ,  G11C11/4096

Abstract: One example of the present disclosure includes performing a comparison operation in memory using a logical representation of a first value stored in a first portion of a number of memory cells coupled to a sense line of a memory array and a logical representation of a second value stored in a second portion of the number of memory cells coupled to the sense line of the memory array. The comparison operation compares the first value to the second value, and the method can include storing a logical representation of a result of the comparison operation in a third portion of the number of memory cells coupled to the sense line of the memory array.

公开(公告)号：EP3152665A4

公开(公告)日：2018-01-24

申请号：EP15803929

申请日：2015-05-29

Applicant: MICRON TECHNOLOGY INC

Inventor： LEIDEL JOHN D ,  WHEELER KYLE B

IPC: G06F12/02 ,  G06F12/06

CPC classification number: G06F12/1009 ,  G06F8/441 ,  G06F9/445 ,  G06F12/02 ,  G06F12/10 ,  G06F2212/657

Abstract: The present disclosure includes apparatuses and methods related to virtual address tables. An example method comprises generating an object file that comprises: an instruction comprising a number of arguments; and an address table comprising a number of indexed address elements. Each one of the number of indexed address elements can correspond to a virtual address of a respective one of the number of arguments, wherein the address table can serves as a target for the number of arguments. The method can include storing the object file in a memory.

公开(公告)号：EP3063765A4

公开(公告)日：2018-01-17

申请号：EP14858055

申请日：2014-10-07

Applicant: MICRON TECHNOLOGY INC

Inventor： WHEELER KYLE B

IPC: G11C7/10 ,  G11C7/22

CPC classification number: G11C11/4094 ,  G11C7/065 ,  G11C7/1006 ,  G11C7/12 ,  G11C11/40622 ,  G11C11/4091

Abstract: The method can include determining the value of the extremum by reading memory cells coupled to the sense line based on the determined location of the extremum value.

公开(公告)号：EP3066665A4

公开(公告)日：2017-07-05

申请号：EP14860497

申请日：2014-11-04

Applicant: MICRON TECHNOLOGY INC

Inventor： WHEELER KYLE B

IPC: G11C8/06 ,  G11C7/10

CPC classification number: G06F7/535 ,  G06F5/01 ,  G06F2207/5353

Abstract: Examples of the present disclosure provide apparatuses and methods for performing division operations in a memory. An example apparatus comprises a first address space comprising a first number of memory cells coupled to a sense line and to a first number of select lines wherein the first address space stores a dividend value. A second address space comprises a second number of memory cells coupled to the sense line and to a second number of select lines wherein the second address space stores a divisor value. A third address space comprises a third number of memory cells coupled to the sense line and to a third number of select lines wherein the third address space stores a remainder value. Sensing circuitry can be configured to receive the dividend value and the divisor value, divide the dividend value by the divisor value, and store a remainder result in the third number of memory cells.

Abstract translation: 本公开的示例提供了用于在存储器中执行划分操作的设备和方法。 示例装置包括：第一地址空间，包括耦合到感测线的第一数量的存储器单元和第一数量的选择线，其中第一地址空间存储被除数。 第二地址空间包括耦合到感测线的第二数量的存储器单元和第二数量的选择线，其中第二地址空间存储除数值。 第三地址空间包括耦合到感测线和第三数量的选择线的第三数量的存储器单元，其中第三地址空间存储余数值。 感测电路可以被配置为接收除数值和除数值，将除数值除以除数值，并将余数结果存储在第三数目的存储器单元中。