公开(公告)号：MY170997A

公开(公告)日：2019-09-23

申请号：MYPI2014002165

申请日：2014-07-23

Applicant: MIMOS BERHAD

Inventor： MUHAMAD AMRI BIN ISMAIL ,  NURAFIZAH BINTI SAIDIN

IPC: H01L21/82 ,  H01L21/00 ,  H01L21/336 ,  H01L29/00 ,  H01L29/78

Abstract: Model parameter extraction for transistor modeling relies on experimental data provided and any discrepancy therein, if undetected at the outset, results in inaccurate models and delay in device/technology development. The method and apparatus of the present disclosure addresses this problem by introducing a consistency check prior to the model extraction stage. The method requires a set of experimental data, such as measured drain currents from the actual fabricated wafer for consistency check. The experimental data is formatted into readable ASCII or text file data for identification of unique points. A set of computer instructions which form the apparatus that evaluates the data consistency then provides the result of the consistency check to permit or restrain the model parameter extraction stage.

公开(公告)号：MY175121A

公开(公告)日：2020-06-09

申请号：MYUI2012004928

申请日：2012-11-14

Applicant: MIMOS BERHAD

Inventor： MUHAMAD AMRI BIN ISMAIL ,  MOHD ROFEI BIN MAT HUSSIN

Abstract: The present invention relates to a method to generate a compact SPICE model based on the available sub-circuit model descriptions. The method comprising: identifying ISFET device geometrics for width, length and gate oxide thickness as inputs in initial ISFET modeling (100); and measuring electrical and electrochemical characteristics of the fabricated [SFET device (200); characterized in that transterring the electrical and electrochemical characteristics measurement data into SPICE nctlist and correlating with simulation setup (300); and optimizing the ISFET model parameters using optimizer in SPICE simulator (400).