公开(公告)号：MY175121A

公开(公告)日：2020-06-09

申请号：MYUI2012004928

申请日：2012-11-14

Applicant: MIMOS BERHAD

Inventor： MUHAMAD AMRI BIN ISMAIL ,  MOHD ROFEI BIN MAT HUSSIN

Abstract: The present invention relates to a method to generate a compact SPICE model based on the available sub-circuit model descriptions. The method comprising: identifying ISFET device geometrics for width, length and gate oxide thickness as inputs in initial ISFET modeling (100); and measuring electrical and electrochemical characteristics of the fabricated [SFET device (200); characterized in that transterring the electrical and electrochemical characteristics measurement data into SPICE nctlist and correlating with simulation setup (300); and optimizing the ISFET model parameters using optimizer in SPICE simulator (400).

公开(公告)号：MY159287A

公开(公告)日：2016-12-30

申请号：MYPI2010004782

申请日：2010-10-11

Applicant: MIMOS BERHAD

Inventor： DANIEL BIEN CHIA SHENG ,  LEE HING WAH ,  MOHD ISMAHADI SYONO ,  ALI ZAINI ABDULLAH ,  MOHD ROFEI BIN MAT HUSSIN

IPC: B01D35/00 ,  B01D46/00

Abstract: A MULTILAYER MICROFLUIDIC FILTER (100) FOR FILTERING UNWANTED PARTICLES IN SAMPLE MOLECULES OR FLUID, COMPRISING A SUBSTRATE (110), SUCH AS A SILICON WAFER HAVING A LAYER OF BORON (120) DOPED ON THE UPPERMOST PORTION OF SAID SUBSTRATE (110), A PLURALITY OF FUNNELE-SHAPED PORES (130), EACH RANDOMLY DISPOSED ON THE SUBSTRATE (110) WITH DIFFERENT ARRANGEMENT OF SIZES AND POSITIONS, AN ADHESIVE LAYER (140), SUCH AS AN ADHESION, RESIST, OR WAX COATED ONTO THE SIDEWALL OF EACH OF THE PLURALITY OF PORES (130), AND ADDITIONAL LAYER OF THIN FILM (150) COATED ONTO THE BOTTOM SURFACE OF THE SUBSTRATE (110) TO IMPROVE THE FILTERING CAPABILITY.

公开(公告)号：MY181509A

公开(公告)日：2020-12-24

申请号：MYUI2013004369

申请日：2013-12-04

Applicant: MIMOS BERHAD

Inventor： MOHD ROFEI BIN MAT HUSSIN ,  SHARAIFAH KAMARIAH BT WAN SABL

Abstract: The present invention relates method for producing a reduced reverse leakage current Schottky diode. The method for reducing the leakage current is incorporated in the method for producing the diode. The method for reducing leakage current further comprising: forming a polysilicon recess after the step of forming the pre-metal dielectric layer (1000); conducting chemical cleaning to remove unreacted metallic layer on the gate oxide (2000) after the step of forming metal silicide layer (500); and conducting second thermal rapid annealing (3000) after removing the unreacted metallic layer on the gate oxide. Most illustrative figure is Figure 1.

公开(公告)号：MY163969A

公开(公告)日：2017-11-15

申请号：MYPI2013700830

申请日：2013-05-21

Applicant: MIMOS BERHAD

Inventor： MUHAMAD RAMDZAN BIN BUYONG ,  AZLINA BINTI MOHD ZAIN ,  KHAIRIL MAZWAN BIN MOHD ZAINI ,  SHARAIFAH KAMARIAH BINTI WAN SABLI ,  MOHD ROFEI BIN MAT HUSSIN

IPC: G01N27/414

Abstract: A METHOD OF FABRICATING ION-SENSITIVE FIELD-EFFECT TRANSISTOR (ISFET) DEVICE BY USING COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR (CMOS) COMPATIBLE IS PROVIDED, THE METHOD INCLUDES THE STEPS OF MARKING AND ETCHING A SILICON LAYER (101), DEPOSITING AN OXIDE LAYER (102), AS WELL AS IMPLANTING PATTERNS ON THE SILICON AND OXIDE LAYERS (101, 102), DEPOSITING A SILICON NITRIDE LAYER (104), SPUTTERING AND ETCHING METAL. THE MOST ILLUSTRATIVE DRAWING: