公开(公告)号：JP2002083918A

公开(公告)日：2002-03-22

申请号：JP2000388711

申请日：2000-12-21

Applicant: MITSUI HIGH TEC

Inventor： YASUNAGA HISASHI ,  HANADA HIDESHI ,  ISHIBASHI TAKAHIRO ,  SUGIMOTO ATSUSHI ,  MICHIYOSHI YUICHI ,  ETO HITOSHI

IPC: B21D22/02 ,  H01L21/301 ,  H01L21/56 ,  H01L23/12 ,  H01L23/28 ,  H01L23/50

Abstract: PROBLEM TO BE SOLVED: To provide a lead frame which can prevent the peel off of leads from a sealing resin and burs on the outside exposed support bars, and a semiconductor device. SOLUTION: A plurality of semiconductor chip mounts 2b are made in a matrix to form unit frame sets 7, and the sets 7 are mounted on a lead frame base 5B. A semiconductor chip is mounted on the semiconductor chip surface of each unit frame 2, the entire unit frame set 7 is sealed with resin to form a resin sealed body 8, and this body is cut to manufacture semiconductor devices. At least, the cut part has thin-walled support bars 2s formed by removing the back side of each unit frame, the tie bars 6 formed thinner than the thickness of the lead frame base 5B, and boundaries 6o formed thinner than the thickness of the base 5B, thus forming a lead frame.

公开(公告)号：JP2001358276A

公开(公告)日：2001-12-26

申请号：JP2000175345

申请日：2000-06-12

Applicant: MITSUI HIGH TEC

Inventor： HANADA HIDESHI ,  SUGIMOTO ATSUSHI ,  MICHIYOSHI YUICHI

IPC: H01L23/28 ,  H01L23/31 ,  H01L23/495 ,  H01L23/50

Abstract: PROBLEM TO BE SOLVED: To obtain a semiconductor device where pads for mounting a semiconductor chip and a plurality of leads arranged around the pads are exposed to the backside of a resin sealed package, and a lead frame for manufacturing the semiconductor device in which a specific one of the plurality of leads can be identified from the backside of the package of the semiconductor device. SOLUTION: The semiconductor device 1 is provided, at an edge part of a pad 2, with a part 2I for indicating a specific lead, i.e., a lead #1, on the backside 4b of a package 4. The lead frame 100 is provided, at an edge part of a pad 4, with a machining part 2A constituting the part 2I for indicating a specific lead, i.e., the lead #1, on the backside 4b of the package 4.

公开(公告)号：JP2001274310A

公开(公告)日：2001-10-05

申请号：JP2000084056

申请日：2000-03-24

Applicant: MITSUI HIGH TEC

Inventor： ISHIHARA MASAMICHI ,  UMEDA KAZUHIKO ,  SUGIMOTO ATSUSHI

IPC: H01L23/12 ,  H01L21/60 ,  H01L23/50

Abstract: PROBLEM TO BE SOLVED: To obtain a semiconductor device which decreases manufacturing costs, contrives to increase a speed of a signal transmission, does not generate noises, and is small-sized and not damaged when handled, etc. SOLUTION: In a semiconductor device, a lead frame forming a lead which is electrically connected to an electrode of a semiconductor chip is provided on a major face side of the semiconductor chip, and also an external connection terminal is provided in the lead frame and sealed with a sealing material. In a lead frame 5 on a thick side in a plate thickness of laminated lead frames 3 provided with lead frames 5, 6 having different plate thicknesses on both faces via an insulating adhesive material 4, a semiconductor chip 1 is mounted facing the major face side, a plurality of electrodes 2 of the semiconductor chip 1 are connected to a plurality of leads of the lead frame 6 on a thin side in the plate thickness by a wire 14, respectively, and an external connection terminal 11 is provided at an end part on a connection side counter to the electrode of the lead.

公开(公告)号：JP2001274308A

公开(公告)日：2001-10-05

申请号：JP2000082091

申请日：2000-03-23

Applicant: MITSUI HIGH TEC

Inventor： YASUNAGA HISASHI ,  SUGIMOTO ATSUSHI

IPC: H01L23/28 ,  H01L21/56 ,  H01L23/12 ,  H01L23/495 ,  H01L23/50

Abstract: PROBLEM TO BE SOLVED: To prevent an infiltration of a resin into a lead on a backside, and also prevent a release of the lead from a sealing resin when cutting into respective semiconductor devices. SOLUTION: In a lead frame 5, a unit frame assembly 7 in which unit frames 2 having leads 2r in an aspect surrounding a chip mounted region 2b in each side of a rectangular plane are connected to each other via a tie bar 6, and which is constituted by aggregating a plurality of the unit frames 2; outer peripheral tie bars 6o for connecting the unit frames 2 in an outer peripheral part of the unit frame assembly 7; cutout parts 5s formed in outward regions of the outer peripheral tie bars 6o; a guide rail 5g provided in the further outward region of the cutout part 5s; and connection pieces 5r for connecting the guide rail 5g with the outer peripheral tie bars 6o; are molded, and a profile of the lead frame 5 is processed. A resin sealing is molded so as to collectively containing the unit frame aggregation 7 and a part of the guide rail 5g excluding the reverse face, and this is cut off and separated along the tie bars 6 and the outer peripheral tie bars 6o.

公开(公告)号：JP2010267850A

公开(公告)日：2010-11-25

申请号：JP2009118652

申请日：2009-05-15

Applicant: Mitsui High Tec Inc ,  株式会社三井ハイテック

Inventor： SUGIMOTO ATSUSHI

IPC: H01L23/50

CPC classification number: H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device and a method of manufacturing the semiconductor device capable of previously preventing occurrence of various kinds of inconveniences caused by occurrence of voids because of non-filling of a mold resin for a semiconductor device, where a die pad for mounting a semiconductor chip is exposed to a surface at a packaging side of a resin package, and for a method of manufacturing the semiconductor device. SOLUTION: The method of manufacturing the semiconductor device 1 includes: a process for forming a recess 3r for capturing residual air following a resin-sealing process while the recess 3r communicates with a groove section 3g of a die pad 3 at a position, where occurrence of voids because of non-filling of a mold resin does not poorly affect quality of a product in a packaging-side surface 2a of the die pad 3; and a resin-sealing process for covering the packaging-side surface 2a of the die pad 3 formed with the recess 3r with a resin-sealing sheet and molding a package 2 by a mold apparatus. COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 解决的问题：为了提供一种半导体器件和半导体器件的制造方法，其能够防止由于半导体器件的模制树脂的不填充而发生由于空隙发生而引起的各种不便， 其中用于安装半导体芯片的管芯焊盘暴露于树脂封装的封装侧的表面，以及用于制造半导体器件的方法。 解决方案：制造半导体器件1的方法包括：形成用于在树脂密封工艺之后捕获残余空气的凹槽3r的工艺，同时凹部3r与管芯焊盘3的槽部3g在位置 由于未填充模具树脂而产生的空隙不会影响芯片焊盘3的封装侧表面2a中的产品的质量; 以及树脂密封工艺，用树脂密封片覆盖形成有凹槽3r的模具垫3的包装侧表面2a，并通过模具装置模制包装2。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2002026217A

公开(公告)日：2002-01-25

申请号：JP2000202680

申请日：2000-07-04

Applicant: MITSUI HIGH TEC

Inventor： YASUNAGA HISASHI ,  SUGIMOTO ATSUSHI ,  ISHIHARA MASAMICHI

IPC: H01L23/50

Abstract: PROBLEM TO BE SOLVED: To cut out individual semiconductor devices with high productivity without generating burrs and lead exfoliation, from a semiconductor device row wherein a plurality of lead frames are continuously formed as interposers in many rows or a single row, semiconductor chips are mounted on the lead frames, and the semiconductor chip mounting side is sealed with resin. SOLUTION: The plurality of lead frames are formed continuously in many rows or a single row. The semiconductor chip is mounted on a chip mounting part of each of the lead frames. The chips are electrically connected with leads. The single surfaces of the lead frames mounting the chips are sealed with resin and semiconductor devices are formed. In the method for cutting out each of the devices, the resin-sealed side 9 is put on a table 13, and cutting-out is performed individually from the lead frame 1 side exposed from the sealing resin, by using a rotary cutter 14 or a blade equipped with a slit on the peripheral surface.

公开(公告)号：JP2001110929A

公开(公告)日：2001-04-20

申请号：JP28461299

申请日：1999-10-05

Applicant: MITSUI HIGH TEC

Inventor： ISHIHARA MASAMICHI ,  YASUNAGA HISASHI ,  TAKAI KEIJI ,  SUGIMOTO ATSUSHI

IPC: H01L23/12 ,  H01L23/50

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device which can be manufactured at a lower cost, lessened in external dimensions as much as possible, and improved in mounting properties. SOLUTION: A semiconductor device 1 is equipped with leads 11 on the under surface of a semiconductor chip 4 through the intermediary of an insulating adhesive material, the semiconductor chip 4 is connected to the leads 11 with bonding wires 5, the semiconductor chip 4, the leads 11, and the bonding wires 5 are sealed up in a package 2 with sealing resin, the leads 11 are extended like a flat plate along the under surface of the semiconductor chip 4 and made to protrude from the outer edge of the semiconductor chip 4, the parts of the protruding leads 11 close to the outer edge are made to serve as bonding areas, and solder balls 3 are provided as outer connection terminals to the leads 11 through the intermediary of openings 2h provided in the mounting surface 2a of the package 2.

公开(公告)号：JP2001085363A

公开(公告)日：2001-03-30

申请号：JP25896799

申请日：1999-09-13

Applicant: MITSUI HIGH TEC

Inventor： SUGIMOTO ATSUSHI ,  ISHIHARA MASAMICHI

IPC: H01L23/52 ,  H01L21/301 ,  H01L21/3205 ,  H01L27/00

Abstract: PROBLEM TO BE SOLVED: To obtain a method for manufacturing a semiconductor device, capable of preventing a damage of a wafer or the device on the way of manufacturing. SOLUTION: This method for manufacturing a semiconductor device comprises a step of forming a wiring pattern and electrode pads 2 on a wafer 1, a step of assembling by each semiconductor device area 1A of the wafer, a step of forming grooves 1s for partitioning the wafer 1 at the surface 1a side formed with the pads 2 of the wafer 1 by each area 1A, and a step of grinding the surface 1b which is not formed with the pads 2 of the wafer 1 to separate the wafer 1 to the respective devices 10 by the grooves 1s.

公开(公告)号：JP2010267849A

公开(公告)日：2010-11-25

申请号：JP2009118651

申请日：2009-05-15

Applicant: Mitsui High Tec Inc ,  株式会社三井ハイテック

Inventor： SUGIMOTO ATSUSHI

IPC: H01L21/56 ,  H01L23/12 ,  H01L23/50

CPC classification number: H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014

Abstract: PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device capable of previously preventing occurrence of various kinds of inconveniences caused by occurrence of voids because of non-filling of a mold resin in a resin-sealing process for a method of manufacturing a semiconductor device, where a die pad for mounting a semiconductor chip is exposed to a surface at a packaging side of a resin package.
SOLUTION: The method of manufacturing the semiconductor device includes: a process for covering a surface at a packaging side of the die pad 3 with a resin-sealing sheet 10 having an exhaust passage 10a communicating with a groove section 3g of the die pad; a process for setting the exhaust passage of the resin-sealing sheet while the exhaust passage faces a residual air capturing recess 100a of a lower mold 100L in a mold apparatus 100; and a resin-sealing process for filling a mold resin into the mold apparatus, discharging residual air to the residual air capturing recess of the lower mold via an exhaust passage of the resin-sealing sheet, and molding a package.
COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供一种制造半导体器件的方法，该半导体器件能够预先防止由于在用于方法的树脂密封工艺中的模制树脂的不填充而发生空隙的各种不便之处 制造半导体器件，其中用于安装半导体芯片的管芯焊盘暴露于树脂封装的封装侧的表面。 解决方案：半导体器件的制造方法包括：利用具有与模具的槽部3g连通的排气通路10a的树脂密封片10覆盖芯片焊盘3的封装侧的表面的工序 垫; 在模具装置100中，排气通道面向下模具100L的残留空气捕获凹部100a的过程中，设置树脂密封板的排气通道的过程; 以及用于将模制树脂填充到模具装置中的树脂密封工艺，通过树脂密封片的排气通道将残留的空气排放到下模具的残余空气捕获凹部，并且模制包装。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2002231872A

公开(公告)日：2002-08-16

申请号：JP2001027146

申请日：2001-02-02

Applicant: MITSUI HIGH TEC

Inventor： SUGIMOTO ATSUSHI

IPC: H01L23/50

Abstract: PROBLEM TO BE SOLVED: To provide a lead frame capable of manufacturing a high quality semiconductor device wherein it is possible to perform cutting operations with high accuracy and smoothness and delaminations of an encapsulation resin can reversibly be prevented. SOLUTION: The lead frame 5 of this invention has a flat shape and is configured in a matrix-shape by connecting unit frames 2 having leads 2r surrounding a semiconductor chip mounting area 2b on each side via tie bars 6 and assembling plural unit frames to form one semiconductor device 1. The lead frame 5 is includes a unit frame aggregate 7 wherein each semiconductor 1 is fabricated by resin encapsulation at one operation after semiconductor chips are bonded and by cutting tie bars 6 and outer circumferential portions 6o. Also, slits 5c are included along cutting lines in prolongation of cutting plane line of a unit frame aggregate 7 in outward of a unit frame aggregate 7 within the resin-encapsulated area 8.