公开(公告)号：JP2002184927A

公开(公告)日：2002-06-28

申请号：JP2000385832

申请日：2000-12-19

Applicant: MITSUI HIGH TEC

Inventor： MICHIYOSHI YUICHI

IPC: H01L21/56 ,  H01L23/50

Abstract: PROBLEM TO BE SOLVED: To provide the manufacturing method of a semiconductor device whose cost can be reduced and manufacture time can be shortened, by stabilizing the flatness of a lead and a pad and saving a work process for removing resin stuck to an exposure face. SOLUTION: A semiconductor chip loading part and the lead of a lead frame are formed on a substrate by using a non-through groove. A semiconductor chip and the like are arranged and are resin-sealed. Then, the non-through groove is pierced and the semiconductor device is formed.

公开(公告)号：JP2001092936A

公开(公告)日：2001-04-06

申请号：JP26839299

申请日：1999-09-22

Applicant: MITSUI HIGH TEC

Inventor： MICHIYOSHI YUICHI

IPC: G06K19/07 ,  G06K19/077

Abstract: PROBLEM TO BE SOLVED: To provide an extremely thin radio frequency tag, which facilitates the reduction of the production cost, and production thereof. SOLUTION: Between first and second substrates 20 and 80 having electric insulation, an antenna pattern 30 integrated with the first substrate 20 while having first and second connecting terminals 31 and 32, an integrated circuit chip 40 having first and second electrode pads 41 and 42 on an active surface and a connecting lead 60 for respectively connecting the first connecting terminal 31 and the first electrode pad 41 and connecting the second connecting terminal 32 and the second electrode pad 42 are provided and the connecting lead 60 is formed while using a conductive resin material or conductive paste for connecting the first connecting terminal 31 and the second connecting terminal 32 and connecting the first electrode pad 41 and the second electrode pad 42.

公开(公告)号：JP2001135771A

公开(公告)日：2001-05-18

申请号：JP31444199

申请日：1999-11-04

Applicant: MITSUI HIGH TEC

Inventor： TAKAI KEIJI ,  MICHIYOSHI YUICHI

IPC: H01L23/50

Abstract: PROBLEM TO BE SOLVED: To manufacture a lead frame from a metal thin plate having a satisfactory yield and provide a method of manufacturing a lead frame preferable for miniaturization of a semiconductor device to a semiconductor chip size. SOLUTION: In this method of manufacturing a lead frame by punching a metal thin plate with a press, a lead 3 punched from the metal thin plate 16 with a punch 13 is pressed onto an insulating adhesive tape 2. A heating device 17 is abutted with the backside of the site of the insulating adhesive tape 2, onto which the lead 3 is pressed to heat the lead to have this lead 3 bonded and fixed to the insulating adhesive tape 2. Subsequently, this punch 13 and the heating device 17 are allowed to recede and the insulating adhesive tape 2 travels, so that the next lead bonding position of the insulating adhesive tape 2 is positioned under the lower surface of the punch 13. A lead punched with the punch 13 is pressed onto the insulating adhesive tape 2. The heating device 17 made to proceed is brought into abutment against the rear surface of the pressed site for heating the lead and the lead is bonded and fixed on the insulating adhesive tape 2. By repeating this processing, the lead frames are formed on the insulating adhesive tape 2.

公开(公告)号：JP2001094031A

公开(公告)日：2001-04-06

申请号：JP26675199

申请日：1999-09-21

Applicant: MITSUI HIGH TEC

Inventor： MICHIYOSHI YUICHI

IPC: H01L25/00

Abstract: PROBLEM TO BE SOLVED: To provide a very thin type radio frequency tag for which manufacturing cost can be reduced easily. SOLUTION: An antenna circuit pattern 30, having a first connection terminal 31 and a second connection terminal 32, and an IC chip 40 having a first electrode pad 41 and a second electrode pad 42 on the active surface are arranged between a first insulating substrate 20 and a second insulating substrate 60. The IC chip 40 is mounted, intersecting a prescribed portion of the antenna circuit pattern 30. A first connection terminal 31 and a second connection terminal 32 are folded back toward the electrode pad surface side of the IC chip 40 and are connected with the first electrode pad 41 and the second electrode pad 42, respectively, thereby forming an electrically continuous circuits.

公开(公告)号：JP2001084348A

公开(公告)日：2001-03-30

申请号：JP25572799

申请日：1999-09-09

Applicant: MITSUI HIGH TEC

Inventor： MICHIYOSHI YUICHI

IPC: G06K19/077 ,  G06K19/07 ,  H01Q1/38 ,  H01Q7/00

Abstract: PROBLEM TO BE SOLVED: To adapt a recording medium to a single sided substrate by connecting a semiconductor chip and the inner peripheral end and the outer peripheral end of a spiral pattern via through holes formed on the inner side and the outer side of a winding part in the spiral pattern. SOLUTION: The spiral pattern 12 is spirally installed from the center of a substrate 10 to an edge part. The inner peripheral end 20 and the outer peripheral end 22 for connecting them with the semiconductor chip 14 are installed on the both ends. The semiconductor chip 14 is placed on the surface of the substrate 10 by turning a pad forming face to the substrate 10. A position where the semiconductor chip 14 is placed is above the winding part 13 of the spiral pattern 12. Thus, wiring from the semiconductor chip 14 to the inner peripheral end 20 and the outer peripheral end 22 can avoid the crossing wid the winding part 13. Consequently, constitution by a single sided substrate becomes possible. Since the manufacture process of the single sided substrate is simpler than a double sided substrate such as the non-necessity of the through hole, the single sided substrate is suitable for the recording medium manufactured in large quantity like tags.

公开(公告)号：JP2002083918A

公开(公告)日：2002-03-22

申请号：JP2000388711

申请日：2000-12-21

Applicant: MITSUI HIGH TEC

Inventor： YASUNAGA HISASHI ,  HANADA HIDESHI ,  ISHIBASHI TAKAHIRO ,  SUGIMOTO ATSUSHI ,  MICHIYOSHI YUICHI ,  ETO HITOSHI

IPC: B21D22/02 ,  H01L21/301 ,  H01L21/56 ,  H01L23/12 ,  H01L23/28 ,  H01L23/50

Abstract: PROBLEM TO BE SOLVED: To provide a lead frame which can prevent the peel off of leads from a sealing resin and burs on the outside exposed support bars, and a semiconductor device. SOLUTION: A plurality of semiconductor chip mounts 2b are made in a matrix to form unit frame sets 7, and the sets 7 are mounted on a lead frame base 5B. A semiconductor chip is mounted on the semiconductor chip surface of each unit frame 2, the entire unit frame set 7 is sealed with resin to form a resin sealed body 8, and this body is cut to manufacture semiconductor devices. At least, the cut part has thin-walled support bars 2s formed by removing the back side of each unit frame, the tie bars 6 formed thinner than the thickness of the lead frame base 5B, and boundaries 6o formed thinner than the thickness of the base 5B, thus forming a lead frame.

公开(公告)号：JP2001358276A

公开(公告)日：2001-12-26

申请号：JP2000175345

申请日：2000-06-12

Applicant: MITSUI HIGH TEC

Inventor： HANADA HIDESHI ,  SUGIMOTO ATSUSHI ,  MICHIYOSHI YUICHI

IPC: H01L23/28 ,  H01L23/31 ,  H01L23/495 ,  H01L23/50

Abstract: PROBLEM TO BE SOLVED: To obtain a semiconductor device where pads for mounting a semiconductor chip and a plurality of leads arranged around the pads are exposed to the backside of a resin sealed package, and a lead frame for manufacturing the semiconductor device in which a specific one of the plurality of leads can be identified from the backside of the package of the semiconductor device. SOLUTION: The semiconductor device 1 is provided, at an edge part of a pad 2, with a part 2I for indicating a specific lead, i.e., a lead #1, on the backside 4b of a package 4. The lead frame 100 is provided, at an edge part of a pad 4, with a machining part 2A constituting the part 2I for indicating a specific lead, i.e., the lead #1, on the backside 4b of the package 4.

公开(公告)号：JP2001313362A

公开(公告)日：2001-11-09

申请号：JP2000130529

申请日：2000-04-28

Applicant: MITSUI HIGH TEC

Inventor： FUKUI ATSUSHI ,  TSUJIMOTO KEIICHI ,  MICHIYOSHI YUICHI

IPC: H01L23/12 ,  H01L23/50

Abstract: PROBLEM TO BE SOLVED: To obtain a chip-size semiconductor device, employing a highly reliable lead frame in which the outer connection terminals have high positional accuracy and bonding work to a semiconductor chip is carried out with high workability, without causing deformation of the lead at the time of die bonding. SOLUTION: In a semiconductor device, where a semiconductor chip and leads are connected electrically and resin sealed and the bottom face of the lead, is exposed from the resin seal, the semiconductor chip 1 and the leads 2 are connected via bumps 7, the lead 2 is formed thin 4 on the outside part in the resin seal 3 and the thick inside part 6 thereof has a bottom face exposed from the resin seal to constitute an outer connection terminal.