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公开(公告)号：GB2314742B
公开(公告)日：2001-02-14
申请号：GB9710089
申请日：1997-05-20
Applicant: MOTOROLA INC
Inventor： GOODE STEVEN H , BAKER JAMES C , CARNEY MICHAEL J
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公开(公告)号：SG46258A1
公开(公告)日：1998-02-20
申请号：SG1996001651
申请日：1993-01-21
Applicant: MOTOROLA INC
Inventor： LAROSA CHRISTOPHER P , CARNEY MICHAEL J , BAKER JAMES C
Abstract: The method of synchronizing a sampling clock signal to a received data signal, the clock recovery circuit generates several clock signals at the symbol rate, with each clock signal having a unique phase. To permit fast initial acquisition, the set of clock signals includes a pair of clocks which differ in phase by one-half of a symbol interval. Additionally, the clock recovery circuitry generates error signals representing the difference between the phase of the received data signal and the phase of each clock signal. The error signals are processed over multiple symbol times to determine the optimal sampling phase. The clock recovery circuit then adjusts or maintains the phase of the symbol clock to provide the optimal sampling phase.
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公开(公告)号：MX9704826A
公开(公告)日：1997-12-31
申请号：MX9704826
申请日：1997-06-26
Applicant: MOTOROLA INC
Inventor： GOODE STEVEN H , BAKER JAMES C , CARNEY MICHAEL J
Abstract: El extremo posterior del receptor de FM digital recibe una señal de frecuencia intermedia analogica desde un extremo anterior de radiofrecuencia (310) que tiene un circuito heterodino (312) y un filtro de frecuencia intermedia (314). En el extremo posterior del receptor (307), un desmodulador digital (330) que tiene un limitador (333), un digitalizador de fase directa (336) y un circuito diferencial de fase (339) produce una señal diferencial de fase digital a partir de la señal de frecuencia intermedia analogica. Luego, un procesador digital (360) filtra y reduce el ruido en la señal diferencial de fase digital usando un filtro de pase de banda (362), un filtro desacentuador (364) y un expansor (366). Finalmente, un amplificador de sonido de modulacion de duracion de impulso (380) prepara la señal para su reproduccion en un parlante de sonido (390). El extremo posterior de receptor de FM digital evita los problemas de desplazamiento de corriente continua propios comunes para los receptores de FM analogicos. Y también ofrece una alternativa de complejidad, tamaño y consumo de potencia reducidos para los receptores de FM digitales convencionales.
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公开(公告)号：CA2097058C
公开(公告)日：1996-12-10
申请号：CA2097058
申请日：1992-08-19
Applicant: MOTOROLA INC
Inventor： KAZECKI HENRY L , BAKER JAMES C
IPC: H04Q7/38 , H04J3/00 , H04L7/04 , H04L7/10 , H04L27/22 , H04L27/227 , H04J3/06 , H04L7/00 , H04B1/18
Abstract: The present invention presents an apparatus and method for recovering symbols in a data packet (101) transmitted to a receiver from a remote signal source (204) in a time-varying channel using multiple sampling points. In a digital cellular radiotelephone TDMA system, the receiver (202) performs a complex correlation on the desired slot sync word (DSSW) and the coded digital verification color code (CDVCC) in the data packet (101), and on the adjacent slot sync word (ASSW) in an adjacent data packet (102) to produce a first, second and third optimum sampling point, respectively. The data packet (101) is divided into four regions (A, B, C and D). The symbols in each region (A, B, C and D) are serially recovered using one or more of the multiple sampling points depending on the quality of the sampling point adjacent to each region (A, B, C and D).
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公开(公告)号：DE3650481T2
公开(公告)日：1996-09-05
申请号：DE3650481
申请日：1986-03-25
Applicant: MOTOROLA INC
Inventor： GOODE STEVEN H , KAZECKI HENRY L , BAKER JAMES C
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Patent Agency Ranking
公开(公告)号：DE3650481D1
公开(公告)日：1996-03-21
申请号：DE3650481
申请日：1986-03-25
Applicant: MOTOROLA INC
Inventor： GOODE STEVEN H , KAZECKI HENRY L , BAKER JAMES C
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公开(公告)号：AT134090T
公开(公告)日：1996-02-15
申请号：AT90118813
申请日：1986-03-25
Applicant: MOTOROLA INC
Inventor： GOODE STEVEN H , KAZECKI HENRY L , BAKER JAMES C
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公开(公告)号：GB2265800B
公开(公告)日：1995-11-01
申请号：GB9310866
申请日：1992-08-19
Applicant: MOTOROLA INC
Inventor： KAZECKI HENRY L , BAKER JAMES C
Abstract: The present invention presents an apparatus and method for recovering symbols in a data packet (101) transmitted to a receiver from a remote signal source (204) in a time-varying channel using multiple sampling points. In a digital cellular radiotelephone TDMA system, the receiver (202) performs a complex correlation on the desired slot sync word (DSSW) and the coded digital verification color code (CDVCC) in the data packet (101), and on the adjacent slot sync word (ASSW) in an adjacent data packet (102) to produce a first, second and third optimum sampling point, respectively. The data packet (101) is divided into four regions (A, B, C and D). The symbols in each region (A, B, C and D) are serially recovered using one or more of the multiple sampling points depending on the quality of the sampling point adjacent to each region (A, B, C and D).
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公开(公告)号：GB2253749B
公开(公告)日：1995-05-17
申请号：GB9124475
申请日：1991-11-18
Applicant: MOTOROLA INC
Inventor： BAKER JAMES C , CARNEY MICHAEL J
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公开(公告)号：CA2102406A1
公开(公告)日：1993-09-27
申请号：CA2102406
申请日：1993-01-21
Applicant: MOTOROLA INC
Inventor： LAROSA CHRISTOPHER P , CARNEY MICHAEL J , BAKER JAMES C
Abstract: The method of synchronizing a sampling clock signal to a received data signal, the clock recovery circuit generates several clock signals at the symbol rate, with each clock signal having a unique phase. To permit fast initial acquisition, the set of clock signals includes a pair of clocks which differ in phase by one-half of a symbol interval. Additionally, the clock recovery circuitry generates error signals representing the difference between the phase of the received data signal and the phase of each clock signal. The error signals are processed over multiple symbol times to determine the optimal sampling phase. The clock recovery circuit then adjusts or maintains the phase of the symbol clock to provide the optimal sampling phase.
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