公开(公告)号：JPH11232877A

公开(公告)日：1999-08-27

申请号：JP22108498

申请日：1998-07-21

Applicant: MOTOROLA INC

Inventor： NOGLE SCOTT GEORGE ,  ROTH ALAN S ,  HO SHUANG LI

IPC: G11C11/413 ,  G11C7/00 ,  G11C7/10 ,  G11C7/22 ,  G11C8/16 ,  G11C11/41

Abstract: PROBLEM TO BE SOLVED: To realize a dual port RAM which uses a single port SRAM cell, can be manufactured by using a small integrated circuit surface area, is inexpensive and large, and operates at high speed. SOLUTION: A pipelined dual port integrated circuit memory 20 comprises an array 30 of static random access memory (SRAM) cells, and each of memory cells 80 is connected to a single word line 72 and a pair of single bit lines 74, 76. A control circuit 32 controls access to a memory cell substantially simultaneous request to access is successively served in a clock signal of a single cycle of a data processor accessing to the memory 20. An address collision detector compares addresses given to two ports, and generates a matching signal used for deciding which port is served first out of two ports independently whichever port out or written in.