Synchronous am detector
    2.
    发明授权
    Synchronous am detector 失效
    同步上位检测器

    公开(公告)号:US3697685A

    公开(公告)日:1972-10-10

    申请号:US3697685D

    申请日:1970-04-13

    Applicant: MOTOROLA INC

    Inventor: LUNN GERALD K

    CPC classification number: H04N5/455

    Abstract: A combined final IF amplifier and detector stage for a television receiver includes an integrated circuit having first and second transistor differential amplifier detector stages, the common-connected emitters of each stage of which are coupled with the collector of a different one of the transistors of a third differential amplifier stage to which the input signals are supplied. Switching of the first and second differential amplifier stages at the video carrier frequency is effected under control of a fourth differential amplifier which is driven into limiting by the input signal. To prevent intermodulation between the chroma and sound subcarrier sidebands from producing an objectionable beat signal in the output of the first and second differential amplifiers, a frequency selective circuit is connected across the outputs of the fourth differential amplifier. This frequency selective circuit peaks at the video carrier frequency and includes a notch at the chroma subcarrier frequency.

    Gated differential gain control circuit for a television receiver
    3.
    发明授权
    Gated differential gain control circuit for a television receiver 失效
    电视接收机的差分增益控制电路

    公开(公告)号:US3598902A

    公开(公告)日:1971-08-10

    申请号:US3598902D

    申请日:1969-06-11

    Applicant: MOTOROLA INC

    CPC classification number: H04N5/53

    Abstract: A monolithic integrated automatic gain control system for a TV receiver includes a differential gating stage having one reference input, a gating pulse input and a synchronizing signal pulse input. This gating stage is responsive to simultaneous application of gating and sync pulses to provide an output signal proportional to the signal level of the video sync pulse. This output signal is supplied to a differential IF-AGC amplifier stage which supplies an amplified IF-AGC output signal to the IF amplifier of a TV receiver to control the gain thereof. A differential RF-AGC amplifier and delay stage is coupled to the IF-AGC amplifier stage output and provides a delayed RF-AGC signal which is supplied to the RF-amplifier of the TV receiver to provide a delayed RF gain control signal thereto.

    Diffused resistor
    4.
    发明授权
    Diffused resistor 失效
    扩散电阻

    公开(公告)号:US3700977A

    公开(公告)日:1972-10-24

    申请号:US3700977D

    申请日:1971-02-17

    Applicant: MOTOROLA INC

    Inventor: LUNN GERALD K

    CPC classification number: H01L27/0802 Y10S148/136

    Abstract: There is disclosed an improved technique for reducing or eliminating parasitic capacitance associated with diffused resistors in which the normal buried layer is eliminated and in which each resistor is either fully or partially surrounded by an isolation ring. The epitaxial layer between the resistive element and the isolation ring is provided with a back bias either at one end of the resistor or at the point along the resistor at which no signal exists. In one case this may be accomplished by shorting the epitaxial layer to the low impedance end of the resistor. In the embodiment in which one end of the resistor is shorted to the epitaxial layer, the resistor is polarized having a low impedance end and a high impedance end, such that the end to which the epitaxial layer is shorted is the end which is coupled to the low impedance node of a circuit. In the case where the resistor is to be coupled across nodes having equal impedance, the epitaxial layer is provided with back bias adjacent that point along the length of the resistor at which no signal appears. There is also disclosed a guard circuit, which minimizes parasitic capacitance in cases where a low resistivity epitaxial layer or a buried layer is provided. The guard circuit is in the form of an impedance convertor having a high impedance output applied to the high impedance end of the resistor while the low impedance of the convertor is coupled to an epitaxial layer contact adjacent this high impedance end. In the guard circuit embodiment, an additional epitaxial layer contact is provided adjacent the low impedance end of the resistor and is shorted thereto so as to provide the aforementioned back bias.

    Abstract translation: 公开了一种用于减少或消除与扩散电阻相关联的寄生电容的改进技术,其中消除了正常掩埋层,并且其中每个电阻器被完全或部分地被隔离环包围。 电阻元件和隔离环之间的外延层在电阻器的一端处或在电阻器处没有信号存在的点处设置有背偏置。 在一种情况下,这可以通过将外延层短路到电阻器的低阻抗端来实现。 在其中电阻器的一端与外延层短接的实施例中,电阻极化具有低阻抗端和高阻抗端,使得外延层短接的端部是耦合到 电路的低阻抗节点。 在要将电阻器耦合到具有相等阻抗的节点上的情况下,外延层在沿着电阻器的长度不存在任何信号的情况下邻近该点提供反向偏置。 还公开了一种保护电路,其在提供低电阻外延层或掩埋层的情况下使寄生电容最小化。 保护电路是阻抗转换器的形式,其具有施加到电阻器的高阻抗端的高阻抗输出,而转换器的低阻抗耦合到邻近该高阻抗端的外延层接触。 在保护电路实施例中,在电阻器的低阻抗端附近提供附加的外延层接触,并将其短路以提供前述的背偏置。

    Gain controlled differential amplifier circuit
    5.
    发明授权
    Gain controlled differential amplifier circuit 失效
    增益差分放大器电路

    公开(公告)号:US3641450A

    公开(公告)日:1972-02-08

    申请号:US3641450D

    申请日:1970-12-15

    Applicant: MOTOROLA INC

    Inventor: LUNN GERALD K

    CPC classification number: H03G3/3015 H03G1/0023 H03G1/0082 H03G3/3063

    Abstract: A two-stage monolithic differential amplifier circuit employs electronic gain control of both of the stages in order to improve the signal-to-noise ratio of the circuit and to reduce signal distortion and cross-modulation at high-signal levels. The input differential stage operates with current-division gain control. The output signals of the input stage are applied to the second or output differential amplifier stage, in which the transistors each have emitter resistors connected to a common terminal. The emitter resistors each are shunted by the collector-emitter path of a shunt transistor which is rendered nonconductive for maximum gain reduction of the output stage and which is saturated for minimum gain reduction of the output stage. The DC level of the output stage is maintained substantially constant throughout the AC gain control range.

    Abstract translation: 两级单片差分放大器电路采用两级的电子增益控制,以提高电路的信噪比,并在高信号电平下减少信号失真和交叉调制。 输入差分级采用电流分压增益控制。 输入级的输出信号被施加到第二或输出差分放大器级,其中晶体管各自具有连接到公共端子的发射极电阻。 发射极电阻各自由分流晶体管的集电极 - 发射极路径分流,分流晶体管被引导为不导通,用于输出级的最大增益减小,并且为了输出级的最小增益减小饱和。 在整个AC增益控制范围内,输出级的直流电平保持基本恒定。

    Color television signal demodulation system with compensation for high-frequency rolloff in the luminance signal
    6.
    发明授权
    Color television signal demodulation system with compensation for high-frequency rolloff in the luminance signal 失效
    彩色电视信号解调系统,用于补偿信号中的高频滚动

    公开(公告)号:US3624275A

    公开(公告)日:1971-11-30

    申请号:US3624275D

    申请日:1969-11-04

    Applicant: MOTOROLA INC

    Inventor: LUNN GERALD K

    CPC classification number: H04N9/66

    Abstract: A silicon monolithic integrated circuit consisting of two sets of full-wave synchronous gated transistor demodulators is used to demodulate the red and blue color difference signals present in a composite television signal. Selected outputs of these demodulators are matrixed to provide the green color difference signal. The color difference signals are applied to the bases of emitter-follower output amplifiers which also are supplied with the brightness signals from an additional emitter-follower luminance amplifier, the output of which is coupled to the bases of the emitter-follower output amplifiers through coupling capacitors, which compensate for most of the high-frequency rolloff in the brightness signals and further provide filtering of carrier harmonics from the detected color reference signals. Collector current for the switching transistors in the demodulators is obtained from the emitter of the emitter-follower luminance amplifier, so that blanking may be accomplished by rendering the luminance amplifier nonconductive during the blanking intervals.

    7.
    发明专利
    未知

    公开(公告)号:DE69021287D1

    公开(公告)日:1995-09-07

    申请号:DE69021287

    申请日:1990-03-12

    Applicant: MOTOROLA INC

    Abstract: In a TV receiver including multistandard OSD circuitry (20) a method and apparatus for positioning the display including a comparator (37) which compares a predetermined count (position) with a count of the received horizontal frequency to provide delayed horizontal flyback pulses and a dot and column address generator (24) which is synchronized to start with the delayed horizontal flyback pulses. Similar vertical positioning circuits (68, 25) are included.

    LINEAR FULL WAVE RECTIFIER CIRCUIT

    公开(公告)号:MY100603A

    公开(公告)日:1990-12-15

    申请号:MYPI19871887

    申请日:1987-09-23

    Applicant: MOTOROLA INC

    Abstract: A RECTIFIER CIRCUIT (80) WHICH PRODUCES A NEARLY PERFECT FULL WAVE RECTIFIED OUTPUT SIGNAL IN RESPONSE TO RECEIVING A DIFFERENTIALLY APPLIED INPUT SIGNAL. THE RECTIFIER CIRCUIT COMPRISES A PAIR OF RECTIFIERS (88, 86, 90, 92 AND 102, 104, 106 RESPECTIVELY) THAT HAVE SUBSTANTIALLY IDENTICAL NON-LINER TRANSFER CHARACTERISTICS WITH THE FIRST ONE OF THE RECTIFIERS RECEIVING THE DIFFERENTIALLY APPLIED INPUT SIGNAL AT FIRST AND SECOND (82, 84) INPUTS. A CURRENT MIRROR (96) HAVING AN INPUT COUPLED AT A FIRST NODE (94) TO AN OUTPUT OF THE FIRST RECTIFIER PROVIDES AN OUTPUT SIGNAL AT AN OUTPUT THEREOF WHICH IS SUBSTANTIALLY IDENTICAL TO THE OUTPUT SIGNAL APPEARING AT THE OUTPUT OF THE FIRST RECTIFIER. THE SECOND RECTIFIER HAS AN OUTPUT CONNECTED AT A SECOND NODE (98) TO THE OUTPUT OF THE CURRENT MIRROR. A FEEDBACK CIRCUIT (100, 108) IS COUPLED BETWEEN THE SECOND NODE AND AN INPUT OF THE SECOND RECTIFIER TO CAUSE THE OUTPUT SIGNAL APPEARING AT THE OUTPUT OF THE SECOND RECTIFIER TO BE A FULL WAVE RECTIFIED VERSION OF THE DIFFERENTIALLY APPLIED INPUT SIGNAL. THE RECTIFIER CIRCUT IS SUITABLE FOR USE IN VIDEO DETECTOR SYSTEMS.@@(FIG. 3)

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