Abstract:
A combined final IF amplifier and detector stage for a television receiver includes an integrated circuit having first and second transistor differential amplifier detector stages, the common-connected emitters of each stage of which are coupled with the collector of a different one of the transistors of a third differential amplifier stage to which the input signals are supplied. Switching of the first and second differential amplifier stages at the video carrier frequency is effected under control of a fourth differential amplifier which is driven into limiting by the input signal. To prevent intermodulation between the chroma and sound subcarrier sidebands from producing an objectionable beat signal in the output of the first and second differential amplifiers, a frequency selective circuit is connected across the outputs of the fourth differential amplifier. This frequency selective circuit peaks at the video carrier frequency and includes a notch at the chroma subcarrier frequency.
Abstract:
A monolithic integrated automatic gain control system for a TV receiver includes a differential gating stage having one reference input, a gating pulse input and a synchronizing signal pulse input. This gating stage is responsive to simultaneous application of gating and sync pulses to provide an output signal proportional to the signal level of the video sync pulse. This output signal is supplied to a differential IF-AGC amplifier stage which supplies an amplified IF-AGC output signal to the IF amplifier of a TV receiver to control the gain thereof. A differential RF-AGC amplifier and delay stage is coupled to the IF-AGC amplifier stage output and provides a delayed RF-AGC signal which is supplied to the RF-amplifier of the TV receiver to provide a delayed RF gain control signal thereto.
Abstract:
There is disclosed an improved technique for reducing or eliminating parasitic capacitance associated with diffused resistors in which the normal buried layer is eliminated and in which each resistor is either fully or partially surrounded by an isolation ring. The epitaxial layer between the resistive element and the isolation ring is provided with a back bias either at one end of the resistor or at the point along the resistor at which no signal exists. In one case this may be accomplished by shorting the epitaxial layer to the low impedance end of the resistor. In the embodiment in which one end of the resistor is shorted to the epitaxial layer, the resistor is polarized having a low impedance end and a high impedance end, such that the end to which the epitaxial layer is shorted is the end which is coupled to the low impedance node of a circuit. In the case where the resistor is to be coupled across nodes having equal impedance, the epitaxial layer is provided with back bias adjacent that point along the length of the resistor at which no signal appears. There is also disclosed a guard circuit, which minimizes parasitic capacitance in cases where a low resistivity epitaxial layer or a buried layer is provided. The guard circuit is in the form of an impedance convertor having a high impedance output applied to the high impedance end of the resistor while the low impedance of the convertor is coupled to an epitaxial layer contact adjacent this high impedance end. In the guard circuit embodiment, an additional epitaxial layer contact is provided adjacent the low impedance end of the resistor and is shorted thereto so as to provide the aforementioned back bias.
Abstract:
A two-stage monolithic differential amplifier circuit employs electronic gain control of both of the stages in order to improve the signal-to-noise ratio of the circuit and to reduce signal distortion and cross-modulation at high-signal levels. The input differential stage operates with current-division gain control. The output signals of the input stage are applied to the second or output differential amplifier stage, in which the transistors each have emitter resistors connected to a common terminal. The emitter resistors each are shunted by the collector-emitter path of a shunt transistor which is rendered nonconductive for maximum gain reduction of the output stage and which is saturated for minimum gain reduction of the output stage. The DC level of the output stage is maintained substantially constant throughout the AC gain control range.
Abstract:
A silicon monolithic integrated circuit consisting of two sets of full-wave synchronous gated transistor demodulators is used to demodulate the red and blue color difference signals present in a composite television signal. Selected outputs of these demodulators are matrixed to provide the green color difference signal. The color difference signals are applied to the bases of emitter-follower output amplifiers which also are supplied with the brightness signals from an additional emitter-follower luminance amplifier, the output of which is coupled to the bases of the emitter-follower output amplifiers through coupling capacitors, which compensate for most of the high-frequency rolloff in the brightness signals and further provide filtering of carrier harmonics from the detected color reference signals. Collector current for the switching transistors in the demodulators is obtained from the emitter of the emitter-follower luminance amplifier, so that blanking may be accomplished by rendering the luminance amplifier nonconductive during the blanking intervals.
Abstract:
In a TV receiver including multistandard OSD circuitry (20) a method and apparatus for positioning the display including a comparator (37) which compares a predetermined count (position) with a count of the received horizontal frequency to provide delayed horizontal flyback pulses and a dot and column address generator (24) which is synchronized to start with the delayed horizontal flyback pulses. Similar vertical positioning circuits (68, 25) are included.
Abstract:
A RECTIFIER CIRCUIT (80) WHICH PRODUCES A NEARLY PERFECT FULL WAVE RECTIFIED OUTPUT SIGNAL IN RESPONSE TO RECEIVING A DIFFERENTIALLY APPLIED INPUT SIGNAL. THE RECTIFIER CIRCUIT COMPRISES A PAIR OF RECTIFIERS (88, 86, 90, 92 AND 102, 104, 106 RESPECTIVELY) THAT HAVE SUBSTANTIALLY IDENTICAL NON-LINER TRANSFER CHARACTERISTICS WITH THE FIRST ONE OF THE RECTIFIERS RECEIVING THE DIFFERENTIALLY APPLIED INPUT SIGNAL AT FIRST AND SECOND (82, 84) INPUTS. A CURRENT MIRROR (96) HAVING AN INPUT COUPLED AT A FIRST NODE (94) TO AN OUTPUT OF THE FIRST RECTIFIER PROVIDES AN OUTPUT SIGNAL AT AN OUTPUT THEREOF WHICH IS SUBSTANTIALLY IDENTICAL TO THE OUTPUT SIGNAL APPEARING AT THE OUTPUT OF THE FIRST RECTIFIER. THE SECOND RECTIFIER HAS AN OUTPUT CONNECTED AT A SECOND NODE (98) TO THE OUTPUT OF THE CURRENT MIRROR. A FEEDBACK CIRCUIT (100, 108) IS COUPLED BETWEEN THE SECOND NODE AND AN INPUT OF THE SECOND RECTIFIER TO CAUSE THE OUTPUT SIGNAL APPEARING AT THE OUTPUT OF THE SECOND RECTIFIER TO BE A FULL WAVE RECTIFIED VERSION OF THE DIFFERENTIALLY APPLIED INPUT SIGNAL. THE RECTIFIER CIRCUT IS SUITABLE FOR USE IN VIDEO DETECTOR SYSTEMS.@@(FIG. 3)