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公开(公告)号:JPH11231028A
公开(公告)日:1999-08-27
申请号:JP16932098
申请日:1998-06-02
Applicant: MOTOROLA INC
Inventor: MCCARTHY DANIEL M
IPC: G01R31/28 , G01R31/3185 , G11C29/02 , G11C29/00
Abstract: PROBLEM TO BE SOLVED: To test a combinational logic related to built-in memory accurately at high speed by providing a memory array by-pass circuit maintaining the timing of a memory array. SOLUTION: Provided with a memory address 558, a memory address logical part 540 drives to write to and read from a memory array 542. A memory read timing logical part 544 drives a scan by-pass enable logic 548, controls an MUX 546 and selects output according to a scan mode signal 554. A read data driver 550 is provided with output from the MUX 546 and generates a memory read signal 556. Since timing of a scan by-pass data signal 552 is controlled by the memory read timing logical part 544, timing of by-passing the memory array in the scan mode 554 is the same as memory read timing in a functional mode.
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公开(公告)号:JP2003108435A
公开(公告)日:2003-04-11
申请号:JP2002277789
申请日:2002-09-24
Applicant: MOTOROLA INC
Inventor: CIRCELLO JOSEPH C , MCCARTHY DANIEL M , CLOETENS HENRI , WOO NANCY H , HOOSER BRIDGET C
Abstract: PROBLEM TO BE SOLVED: To optimize system memory addressing in an information processing. SOLUTION: This system 10 provides an addressing mode settable by users according to control information included in an input address. By using coding control information stored in an address replacement control resister (70 to 72) set by the plurality of users, specified bits of the input address are replaced, and it is judged whether what bit value must be used to selectively generate a corresponding replacement address. Since the pipeline of a processor need not be changed, various types of replacement addressing modes can be defined by the users, and executed by using either of a general processor and a dedicated processor.
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