Abstract:
An interleaver (100) is for re-arranging in each of L cycles a first set of K data elements into a second set of K data elements using a permutation vector which defines, based on the calculation in each cycle of a cm, an even number of pairs of positions of in the first set to be swapped, wherein cm satisfies a quadratic congruence condition. A processor (103) computes for each of the L cycles a value of the sequence cm and, based on the value, a set of indexes indicating at least two pairs of elements to be swapped, 15 and a processor (101) swaps in each cycle pairs of indicated elements, the swapping of pairs in each cycle being done together in a parallel swapping operation.
Abstract:
A wireless communication receiver comprises a SNR measurement logic (112) for measuring a SNR value of the received signal and signal processing logic (108) arranged to process the received wireless signal (Fig. 1, not shown). The signal processing logic (108) comprises demodulator logic (255) operably coupled to log likelihood ratio (LLR) logic (262) and decoding logic (265). A scaling factor (Q), dependent upon the measured signal-to-noise ratio, is applied to the vector of LLR values provided by de-mapping unit (260). The values are then saturated by converting any values outside the range [-A...+A] to one of -A or +A. The values are then quantized prior to input to a FEC decoder. Scaling factors corresponding to SNR values may be stored in a memory element. Applications include dual-mode TETRA-1 and TETRA-2 receivers.
Abstract:
A wireless communication unit (100) comprises a receiver for receiving a wireless signal having signal-to-noise ratio (SNR) measurement logic (112) for measuring a SNR value of the received signal and signal processing logic (108) arranged to process the received wireless signal. The signal processing logic comprises demodulator logic (255) operably coupled to log likelihood ratio (LLR) logic (262) and decoding logic (265). A scaling factor (Q) is applied to the LLR logic (262) dependent upon the measured signal-to-noise ratio.
Abstract:
An interleaver (100) is for re-arranging in each of L cycles a first set of K data elements into a second set of K data elements using a permutation vector which defines, based on the calculation in each cycle of a sequence c m , an even number of pairs of positions of elements in the first set to be swapped, wherein c m satisfies a quadratic congruence condition. A processor (103) computes for each of the L cycles a value of the sequence c m and, based on the value, a set of indexes indicating at least two pairs of elements to be swapped, and a processor (101) swaps in each cycle pairs of indicated elements, the swapping of pairs in each cycle being done together in a parallel swapping operation.
Abstract translation:交织器(100)用于使用置换向量将L个数据元素的第一组K个数据元素重新排列成第二组K个数据元素,所述置换向量基于序列的每个周期中的计算c m SUB>,要交换的第一组中的元素位置的偶数对,其中c m满足二次全等式条件。 处理器(103)针对L个周期中的每一个计算序列c m的值,并且基于该值,指示指示要交换的至少两对元素对的一组索引,以及 处理器(101)在每个周期中互换所指示的元素对,每个周期中的对的交换在并行交换操作中一起完成。
Abstract:
A wireless communication unit (100) comprises a receiver for receiving a wireless signal having signal-to-noise ratio (SNR) measurement logic (112) for measuring a SNR value of the received signal and signal processing logic (108) arranged to process the received wireless signal. The signal processing logic comprises demodulator logic (255) operably coupled to log likelihood ratio (LLR) logic (262) and decoding logic (265). A scaling factor (Q) is applied to the LLR logic (262) dependent upon the measured signal-to-noise ratio.