DUAL MODE RECEIVER HAVING BATTERY SAVING CAPABILITY
    3.
    发明公开
    DUAL MODE RECEIVER HAVING BATTERY SAVING CAPABILITY 失效
    ZWEIMODENEMPFÄNGERMIT BATTERIESPAARUNG

    公开(公告)号:EP0738442A4

    公开(公告)日:1996-03-04

    申请号:EP92914890

    申请日:1992-06-29

    Applicant: MOTOROLA INC

    Abstract: A dual mode communication receiver a receiver for receiving information transmitted in a first and second modulation format on a common channel, a first demodulator for detecting information transmitted in the first modulation format, and a second demodulator, responsive to the information detected in the first modulation format, for detecting information transmitted in the second modulation format. A power conservation circuit is also provided for selectively supplying power to the first and second demodulators for enabling the detecting of the information transmitted in the first modulation format and the second modulation format, respectively.

    Abstract translation: 双模通信接收机包括用于检测以第一调制格式接收的信息的第一解调器(108)和响应于以第一调制格式检测的信息的第二解调器(112),用于检测以第二调制格式 。 第一和第二解调器(108,112)共享公共的接收器前端(102)。 提供节能电路(104),用于选择性地向第一和第二解调器(108,112)供电,以分别检测以第一调制格式和第二调制格式接收的信息。

    SATELLITE RECEIVER SYSTEM HAVING DOPPLER FREQUENCY SHIFT TRACKING
    4.
    发明公开
    SATELLITE RECEIVER SYSTEM HAVING DOPPLER FREQUENCY SHIFT TRACKING 失效
    与多普勒频偏跟踪卫星接收系统

    公开(公告)号:EP0739555A4

    公开(公告)日:1997-04-16

    申请号:EP95907370

    申请日:1995-01-12

    Applicant: MOTOROLA INC

    CPC classification number: H04B7/01 H04B7/18517 H04L27/2273

    Abstract: A satellite receiver system (400) provides acquisition and frequency tracking of a Doppler-shifted radio signal received from an orbiting satellite. The satellite receiver system (400) includes a Costas phase-lock loop (100) that receives the radio signal and provides an error signal at an error signal output (134) for controlling a conversion frequency generated by a voltage controlled oscillator (200). The voltage controlled oscillator (200) is coupled to the Costas phase-lock loop (100) and generates the conversion frequency for down-converting the radio signal in the Costas phase-lock loop (100). The satellite receiver system (400) further includes a Doppler frequency acquisition and tracking element (300) coupled to the voltage controlled oscillator (200). The Doppler frequency acquisition and tracking element (300) adjusts the conversion frequency to compensate for a Doppler frequency shift occuring in the radio signal due to orbital motion of the orbiting satellite.

    METHOD FOR COMPENSATING FOR DOPPLER FREQUENCY SHIFTS
    6.
    发明公开
    METHOD FOR COMPENSATING FOR DOPPLER FREQUENCY SHIFTS 失效
    方法平衡频移FOR多普勒效应

    公开(公告)号:EP0920748A4

    公开(公告)日:2000-08-30

    申请号:EP97937206

    申请日:1997-07-11

    Applicant: MOTOROLA INC

    Inventor: SIWIAK KAZIMIERZ

    CPC classification number: H04B7/208

    Abstract: A satellite communication system (100) includes a satellite (102) in a predefined orbit projecting a plurality of beams (1-48) designating a coverage area (115). The satellite (102) has a communication device (200), a frequency synthesizer (222) for setting a frequency of the communication device for communicating via a beam of the plurality of beams (1-48) and a controller (216) coupled to the frequency synthesizer (222) for compensating for a Doppler frequency shift associated with the beam.

    METHOD AND APPARATUS FOR SWITCHED DIVERSITY RECEPTION OF A RADIO SIGNAL

    公开(公告)号:CA2152629C

    公开(公告)日:1998-07-21

    申请号:CA2152629

    申请日:1993-12-06

    Applicant: MOTOROLA INC

    Abstract: A method and apparatus in a data communication receiver (100) for diversity reception of a radio signal including a predictably repetitive, predetermined data bit pattern (304) comprises a processor (114) controlling (600) an antenna switch (106) to select between a first antenna feed (102) and a second antenna feed (104) as a momentary source of the radio signal during transmissions of the predetermined data bit pattern (304). The radio signal received from the momentary source is monitored by a data receiver (110) during the transmission of the predetermined bit pattern (304) to derive the data therefrom, and at least one bit error count is determined (604, 610) by the processor (114). After completion of the predetermined bit pattern (304), an antenna feed (102, 104) for the radio signal is selected (616, 620) in response to the at least one bit error count.

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