公开(公告)号：BR8106834A

公开(公告)日：1981-12-22

申请号：BR8106834

申请日：1981-01-09

Applicant: MOTOROLA INC

Inventor： SWISHER S ,  GRINER P ,  BARNETT R

IPC: H03L7/18 ,  H03L7/10 ,  H03L7/107 ,  H03L7/187

Abstract: An improved frequency synthesizer utilizes a first order loop and sample-and-hold phase detector with optimized gain to obtain very fast frequency locking characteristics. In addition, synchronization of the programming of the loop divider and of the range shifting the voltage controlled oscillator is also utilized. An adaptive loop filter is provided to allow a first order loop to be used for lock acquisition and still maintain excellent noise performance after lock has been obtained.

公开(公告)号：WO1981002497A1

公开(公告)日：1981-09-03

申请号：PCT/US1981000046

申请日：1981-01-09

Applicant: MOTOROLA INC

Inventor： MOTOROLA INC ,  SWISHER S ,  BARNETT R ,  GRINER P

IPC: H03L07/18

CPC classification number: H03L7/187 ,  H03L7/107 ,  H03L2207/06

Abstract: An improved frequency synthesizer utilizes a first order loop and sample-and-hold phase detector (20) with optimized gain to obtain very fast frequency locking characteristics. In addition, synchronization of the programming of the loop divider (34) and of the range shifting the voltage controlled oscillator (30) is also utilized. An adaptive loop filter (100) is provided to allow a first order loop to be used for lock acquisition and still maintain excellent noise performance after lock has been obtained.