公开(公告)号：WO1998015056A1

公开(公告)日：1998-04-09

申请号：PCT/US1997011435

申请日：1997-07-08

Applicant: MOTOROLA INC.

Inventor： MOTOROLA INC. ,  KUNDMANN, Thomas ,  MANSOURI, Mack ,  TARRAB, Moshe ,  PISEK, Eran

IPC: H03H07/30

CPC classification number: H04L25/03178 ,  G06F7/5443

Abstract: A filter co-processor (103, 109 and 109 fig.) within a Digital Signal Processor (DSP) takes advantage of the orthogonal nature of modulated signals during the equalization process. Since, after reception, only certain real/imaginary values of the received signals (112) are useful for demodulation, the filter co-processor only processes those values to estimate the transmitted signal. By processing only those values for demodulation, the filter co-processor is able to process information in a given amount of time, leading to increased processing when compared to the prior art.

Abstract translation: 数字信号处理器（DSP）内的滤波器协处理器（103,109和109图）利用均衡过程中调制信号的正交特性。 由于在接收之后，仅接收信号（112）的某些实数/虚数值对于解调是有用的，所以滤波器协处理器仅处理这些值以估计所发送的信号。 通过仅处理那些用于解调的值，滤波器协处理器能够在给定的时间量内处理信息，导致与现有技术相比增加的处理。