公开(公告)号：WO1995001672A1

公开(公告)日：1995-01-12

申请号：PCT/US1994004900

申请日：1994-05-02

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC.

Inventor： MICROUNITY SYSTEMS ENGINEERING, INC. ,  MICHEL, Jean, Yves

IPC: H03M01/36

CPC classification number: H03M1/204 ,  H03M1/365

Abstract: A two-stage flash analog-to-digital signal converter is described. The first stage has a voltage divider network and a set of amplifiers that perform an initial interpolation. The initial interpolation results are directly coupled, i.e., no resistive or capacitive elements, to a second stage comprising a set of comparators having multiple inputs. The multiple inputs of the second stage comparators are weightily coupled to the first stage amplifiers in a manner so as to cause the second stage comparators to generate a digital representation of the analog signal.

Abstract translation: 描述了两级​​闪存模数转换器。 第一级具有分压网络和一组执行初始插值的放大器。 初始插值结果直接耦合到包括具有多个输入的一组比较器的第二级的电阻或电容元件。 第二级比较器的多个输入以这样的方式重叠耦合到第一级放大器，以便使第二级比较器产生模拟信号的数字表示。

公开(公告)号：EP0706731A1

公开(公告)日：1996-04-17

申请号：EP94921895.0

申请日：1994-05-02

Applicant: MicroUnity Systems Engineering, Inc.

Inventor： MICHEL, Jean, Yves

IPC: H03M1

CPC classification number: H03M1/204 ,  H03M1/365

Abstract: A two-stage flash analog-to-digital signal converter is described. The first stage has a voltage divider network and a set of amplifiers that perform an initial interpolation. The initial interpolation results are directly coupled, i.e., no resistive or capacitive elements, to a second stage comprising a set of comparators having multiple inputs. The multiple inputs of the second stage comparators are weightily coupled to the first stage amplifiers in a manner so as to cause the second stage comparators to generate a digital representation of the analog signal.