公开(公告)号：EP0285854B1

公开(公告)日：1992-09-23

申请号：EP88103915.0

申请日：1988-03-11

Applicant: Microelectronics and Computer Technology Corporation

Inventor： Smith, Lawrence Norman

IPC: H01L29/92

CPC classification number: H01L28/40 ,  Y10T29/435

公开(公告)号：EP0329018A3

公开(公告)日：1990-02-28

申请号：EP89102243.6

申请日：1989-02-09

Applicant: Microelectronics and Computer Technology Corporation

Inventor： Smith, Lawrence Norman

IPC: H05K7/06

CPC classification number: H05K7/06 ,  H01L2924/0002 ,  H05K1/0289 ,  H01L2924/00

Abstract: A customizable circuit using a programmable interconnect and a compatible tape design for tape automated bonding of chips to the circuitry. The programmable interconnect comprises layers of wires, with one layer of wires forming overlap regions with the adjacent layer of wires. The wires can be selectively linked later to form the desired interconnect. The selective linkage represents the customization of an otherwise undedicated interconnect. The TAB chip bonding design uses a carrier tape to bond the integrated circuit chips to the programmable interconnect. Also disclosed is a method for forming the interconnect.

公开(公告)号：EP0329018A2

公开(公告)日：1989-08-23

申请号：EP89102243.6

申请日：1989-02-09

Applicant: Microelectronics and Computer Technology Corporation

Inventor： Smith, Lawrence Norman

IPC: H05K7/06

CPC classification number: H05K7/06 ,  H01L2924/0002 ,  H05K1/0289 ,  H01L2924/00

Abstract: A customizable circuit using a programmable interconnect and a compatible tape design for tape automated bonding of chips to the circuitry. The programmable interconnect comprises layers of wires, with one layer of wires forming overlap regions with the adjacent layer of wires. The wires can be selectively linked later to form the desired interconnect. The selective linkage represents the customization of an otherwise undedicated interconnect. The TAB chip bonding design uses a carrier tape to bond the integrated circuit chips to the programmable interconnect. Also disclosed is a method for forming the interconnect.

Abstract translation: 使用可编程互连的可定制电路和兼容的磁带设计，用于将芯片自动绑定到电路。 可编程互连包括导线层，其中一层导线与相邻的导线层形成重叠区域。 电线可以随后选择性地连接以形成期望的互连。 选择性连接代表了另一种无形互连的定制。 TAB芯片接合设计使用载带将集成电路芯片连接到可编程互连。 还公开了一种用于形成互连的方法。

公开(公告)号：EP0285854A1

公开(公告)日：1988-10-12

申请号：EP88103915.0

申请日：1988-03-11

Applicant: Microelectronics and Computer Technology Corporation

Inventor： Smith, Lawrence Norman

IPC: H01L29/92

CPC classification number: H01L28/40 ,  Y10T29/435

Abstract: A thin film capacitor having a top, middle and bottom plate forming two capacitors in series in which the middle plate is a plurality of isolated plates thereby forming a structure of a plurality of two capacitors in series which are all connected in parallel. The capacitor may be integrated into an electronic substrate. The capacitor may be formed by depositing films of the metal conductors and dielectrics and may be formed as an integral part of a semiconductor chip or interconnect substrate.

Abstract translation: 一种薄膜电容器，其具有形成串联的两个电容器的顶部，中间和底部平板，其中中间板是多个隔离板，从而形成串联连接的多个串联的两个电容器的结构。 电容器可以集成到电子基板中。 电容器可以通过沉积金属导体和电介质的膜而形成，并且可以形成为半导体芯片或互连基板的组成部分。