公开(公告)号：US11796924B2

公开(公告)日：2023-10-24

申请号：US17568118

申请日：2022-01-04

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： Shih-Yuan Ma

IPC: G03F7/00 ,  G03F1/70

CPC classification number: G03F7/70633 ,  G03F1/70

Abstract: A method for overlay error correction includes generating a first overlay error based on a first overlay mark, wherein the first overlay error is indicative of a misalignment between a lower pattern and an upper pattern of the first overlay mark. The method also includes generating a second overlay error based on a second overlay mark, in response to an abnormal of the first overlay error is detected. The method further includes determining whether the abnormal of the first overlay error is caused by the misalignment between the lower pattern and the upper pattern depending on the second overlay error.

公开(公告)号：US12242202B2

公开(公告)日：2025-03-04

申请号：US17568151

申请日：2022-01-04

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： Shih-Yuan Ma

IPC: G03F7/00

Abstract: The present disclosure provides a method for overlay error correction. The method includes: obtaining an overlay error based on a lower-layer pattern and an upper-layer pattern of a wafer, wherein the lower-layer pattern is obtained by first fabrication equipment through which the wafer passes, and the upper-layer pattern is obtained by exposure equipment; generating a corrected overlay error based on the overlay error and fabrication processes performed on the wafer after the first fabrication equipment and prior to the exposure equipment; and adjusting the exposure equipment based on the corrected overlay error.

公开(公告)号：US12002765B2

公开(公告)日：2024-06-04

申请号：US17568041

申请日：2022-01-04

Applicant: NANYA TECHNOLOGY CORPORATION

Inventor： Shih-Yuan Ma

IPC: H01L23/544 ,  G03F1/42

CPC classification number: H01L23/544 ,  G03F1/42 ,  H01L2223/54426 ,  H01L2223/5446

Abstract: A mark for overlay error measurement and overlay error measurement is provided. The mark includes a first pattern and a second pattern. The first pattern is disposed on a first surface of a substrate. The second pattern is disposed on a second surface of the substrate. The second surface of the substrate is opposite to the first surface of the substrate. The first pattern overlaps at least a portion of the second pattern, and the first pattern and the second pattern collaboratively define a first overlay error.