HYDROGEN ANNEALING PROCESS FOR SILICON GATE MEMORY DEVICE
    1.
    发明申请
    HYDROGEN ANNEALING PROCESS FOR SILICON GATE MEMORY DEVICE 审中-公开
    硅栅储存装置的氢退火工艺

    公开(公告)号:WO1981000487A1

    公开(公告)日:1981-02-19

    申请号:PCT/US1980001020

    申请日:1980-08-07

    Applicant: NCR CORP

    CPC classification number: H01L27/11517 H01L21/3003

    Abstract: In a method for manufacturing a semiconductor non-volatile SNOS or SONOS memory device having a gate structure which includes a gate oxide layer (11) provided on a semiconductor substrate (16), a nitride layer (12) provided on the gate oxide layer (11) and a polysilicon gate electrode (14) overlying the nitride layer (12), the device is annealed in hydrogen, in an annealing vessel (40), typically for 15-60 minutes at 600-1100`C.

    Abstract translation: 在具有栅极结构的半导体非易失性SNOS或SONOS存储器件的制造方法中,所述栅极结构包括设置在半导体衬底(16)上的栅极氧化物层(11),设置在所述栅极氧化物层上的氮化物层(12) 11)和覆盖氮化物层(12)的多晶硅栅电极(14),该装置在退火容器(40)中在氢气中退火,通常在600-1100℃下15-60分钟。

    SILICON GATE NON-VOLATILE MEMORY DEVICE
    2.
    发明申请
    SILICON GATE NON-VOLATILE MEMORY DEVICE 审中-公开
    硅门非易失性存储器件

    公开(公告)号:WO1981000790A1

    公开(公告)日:1981-03-19

    申请号:PCT/US1980001179

    申请日:1980-09-11

    Applicant: NCR CORP

    CPC classification number: H01L29/66833 H01L29/792

    Abstract: A non-volatile memory device includes a semiconductor substrate (16), a thin, 10-15 Angstroms thick, memory oxide layer (11), a silicon nitride layer (12), a 70-100 Angstroms thick interfacial oxide layer (13), and a polysilicon gate electrode (14). The interfacial oxide layer (13) is formed by chemical vapor deposition at a temperature in the range of about 600-625`C.

    Abstract translation: 非易失性存储器件包括半导体衬底(16),薄的10-15埃厚的存储氧化层(11),氮化硅层(12),70-100埃厚的界面氧化物层(13) ,和多晶硅栅电极(14)。 界面氧化物层(13)通过化学气相沉积在约600-625℃范围内的温度下形成。

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