公开(公告)号：JPH07307719A

公开(公告)日：1995-11-21

申请号：JP12452394

申请日：1994-05-13

Applicant: NEC CORP

Inventor： KAJITANI SHUNICHI

IPC: H04J14/00 ,  H04B10/27 ,  H04B10/272 ,  H04B10/556 ,  H04J4/00 ,  H04J14/02 ,  H04J14/04 ,  H04J14/06 ,  H04B10/20

Abstract: PURPOSE:To provide an optical network capable of handling signals of different transmission speed. CONSTITUTION:Time division multiplexing devices 2-1 to 2-n perform time division multiplexes for plural input signals inputted in parallel in each of input terminals 1-1 to 1-n for equal transmission speed synchronizing with the synchronizing signals with frequencies which are different with each other from synchronizing signal generators 3-1 to 3-n and output time division multiplex signals of the frame frequencies which are different with each other. A wavelength division multiplex is performed for these plural time division signals in a star coupler 5 via electrooptical converters 4-1 to 4-n and optical signals of an arbitrary wavelength are selected by variable wavelength optical filters 6-1 to 6-n. Time division separators 9-1 to 9-n perform time division separation for input time division multiplex signals based on the clock signals of the input time division multiplex signals extracted by clock extracters 8-1 to R-n.

公开(公告)号：JPH02272897A

公开(公告)日：1990-11-07

申请号：JP9454889

申请日：1989-04-13

Applicant: NEC CORP

Inventor： KAJITANI SHUNICHI ,  FUJIWARA MASAHIKO

IPC: H04B10/27 ,  H04B10/00 ,  H04Q3/52 ,  H04Q11/04

Abstract: PURPOSE:To constitute a reception terminal equipment having plural outputs through the use of one photoelectric converter by providing a selecting circuit to time-serially select plural arbitrary signals among plural optical signals in the time of one bit of the optical signal outputted from an optical branching device and to output the optical signal to be time-division multiplexed. CONSTITUTION:As selecting circuits (3-1)-(3-m), optical matrix switches in a tree constitution where a connected condition can be switched at the high speed, are used. The selecting circuits (3-1)-(3-m) input the optical signals outputted from the optical branching devices (2-1)-(2-n), select plural arbitrary signals out of plural optical signals time-serially by switching them at the high speed in the time of one bit and output the signal to be time-division-multiplexed. Thus, since the time division multiplexed signal can be generated by selecting plural optical signals and, simultaneously, can be made as the optical signal as it is when photoelectric converters (5-1)-(5-m) and time division separating circuits (6-1)-(6-m) are provided, light receiving terminals (7-1)-(7-m) having plural outputs can be composed by using one photoelectric converter.

公开(公告)号：JPH02181731A

公开(公告)日：1990-07-16

申请号：JP182489

申请日：1989-01-06

Applicant: NEC CORP

Inventor： FUJIWARA MASAHIKO ,  SUZUKI SHUJI ,  NISHIMOTO YUTAKA ,  KAJITANI SHUNICHI

IPC: G02F1/313 ,  H04B10/00 ,  H04B10/27 ,  H04Q3/52

Abstract: PURPOSE:To obtain the optical speech path which has no switch losses and with which the output level does not depend on the polarization state of incident light by subjecting plural LD optical amplifiers to optical cascade connection on both sides of optical matrix switches by intersecting the polarization directions to be mainly amplified orthogonally with each other. CONSTITUTION:The space divided optical exchange system connected with the optical matrix switches 1a, 1b and 1c, 1d on both sides of an optical inter-stage connection circuit 2 is constituted by connecting the respective input and output sides to the semiconductor laser type (LD) optical amplifiers 41, 42 via a single mode fiber (SMF) array 3a and SMDs 31, 3c and 32 when the speech path to connect the switches 1a, 1c is selected. These amplifiers 41, 42 are provided by intersecting the respectively polarization directions to be mainly amplified orthogonally with each other. The polarization state of the input light signal is preserved as it is in the switches 1a, 1c of this constitution and the switch operation is obtd. without depending on the polarization state of the input light signal as a whole. The level fluctuation of the output light is thus prevented. Since the immediate interaction of both the amplifiers on each other is prevented by the intervention of both the switches, the stable operation is assured while the gain is obtd.

公开(公告)号：JPH02170682A

公开(公告)日：1990-07-02

申请号：JP32324188

申请日：1988-12-23

Applicant: NEC CORP

Inventor： KAJITANI SHUNICHI

IPC: H04N5/268

Abstract: PURPOSE:To obtain an arbitrary test signal even at the time of the absence of an input signal by constituting a switching device of two switching circuits, a control circuit, and a test signal discriminating circuit and performing switching between the signal from the switching circuit and the signal from the test signal discriminating circuit by the second switching circuit. CONSTITUTION:Video signals given to input terminals 211 to 21n are supplied to a switching circuit 2. Control data is supplied to a control circuit 4A and a test signal discriminating circuit 6 through an input terminal 41. This control data is given as a switching signal CS to the switching circuit 2 by the control circuit 4A. The test signal discriminating circuit 6 generates a test signal from control data taken in through the input terminal 41 and outputs this test signal. The output signal from the discriminating circuit 6 and that from the switching circuit 2 are inputted to a second switching circuit 8. These signals are switched by the second switching circuit 8 in accordance with the switching signal CC from the control circuit 4A and are outputted from output terminals 821 to 82n as plural signals.

公开(公告)号：JPH0232684A

公开(公告)日：1990-02-02

申请号：JP18159188

申请日：1988-07-22

Applicant: NEC CORP

Inventor： KAJITANI SHUNICHI

IPC: H04N5/262

Abstract: PURPOSE:To reduce the number of multipliers by controlling the multiplier necessary to be controlled by two control means corresponding to an inputted video signal by either control signal by providing a signal switching means to switch the control signal outputted from the two control means. CONSTITUTION:Two multipliers 10 and 12 are set as the multipliers to perform the arithmetic processing of the video signals inputted from input terminals 100 and 101. Signal switching circuits 22 and 24 to switch so as to supply either the control signals outputted from two control signal generation circuits 26 and 28 which control those multipliers 10 and 12 to the multipliers 10 and 12 are provided. And the video signals inputted from the input terminals 100 and 101 are operated by the multipliers 10 and 12, individually, The multipliers 10 and 12 are controlled by either the control signals from the control signal generation circuits 26 and 28 selected by the signal switching circuits 22 and 24, respectively. In such a way, it is possible to reduce the number of multipliers.

公开(公告)号：JPH01225289A

公开(公告)日：1989-09-08

申请号：JP5110988

申请日：1988-03-03

Applicant: NEC CORP

Inventor： KAJITANI SHUNICHI

IPC: H04N5/262 ,  H04N5/265

Abstract: PURPOSE:To easily control by controlling the gain of the input video signal of two systems, further, adjusting a phase and switching the gain controlled signal and outputting. CONSTITUTION:The input video signals from input terminals 1-1, 1-2, 2-1, 2-2 are supplied to gain control circuits 5, 6 and switching circuits 3, 4. The output of the gain control circuits 5, 6 is supplied to phase adjusting circuits 15, 16 and switching circuits 13, 14. The output of the switching circuits 13, 14 are supplied to a gain control circuit 17. The gain control circuit 17 is controlled by a control signal from a phase adjusting circuit 12. Switching circuits 18, 19 switch the output of the phase adjusting circuits 15, 16 and the gain control circuit 17 to output an output video signal to output terminals 20, 21.

公开(公告)号：JPH07177122A

公开(公告)日：1995-07-14

申请号：JP32160293

申请日：1993-12-21

Applicant: NEC CORP

Inventor： KAJITANI SHUNICHI

IPC: H04J3/22 ,  H04J3/00

Abstract: PURPOSE:To attain multiplex transmission to a signal plural kinds of transmission speeds by using a clock frequency as a control signal switching and selecting a time division multiplexer or a time division demultiplexer in matching with a transmission speed. CONSTITUTION:When a digital input signal is applied to an input terminal in a serial form respectively, the route of the signal is selected by changeover devices 3-1 to 3-n corresponding to a control signal selecting and instructing an output route given from a control signal input terminal 2 and the signal is subjected to time division multiplexing by any of time division multiplexers 4-1 to 4-n. In this case, the control signal is used to selected the time division multiplexer suitable for the transmission speed of the input signal and a changeover device 5 is used to select the transmission signal and it is subjected to electrooptic conversion. Then a clock identification circuit 10 extracts a clock included in the signal converted by a photoelectric converter 8 and generates a control signal used to select any of time division demultiplexers 12-1 to 12-n. Then the signal demultiplexed by the selected time division demultiplexer is outputted from changeover device 13-1 to 13-n to an output terminal.

公开(公告)号：JPH04185139A

公开(公告)日：1992-07-02

申请号：JP31529990

申请日：1990-11-20

Applicant: NEC CORP

Inventor： KAJITANI SHUNICHI ,  FUJIWARA MASAHIKO ,  NAGABORI TAKESHI

IPC: H04B10/27 ,  H04B10/2507 ,  H04B10/275 ,  H04L12/42 ,  H04Q11/00

Abstract: PURPOSE:To attain register insertion access control without opto-electric conversion and electric/optic conversion to an optical signal packet passing through a node by providing a controller implementing register insertion access control with the changeover of through-state and cross-state of a 1st 2X2 optical switch and a 2nd 2X2 optical switch to the system. CONSTITUTION:When a transmission request comes from a transmitter 17 to a controller 9, a receiver 14 of an address discrimination device 1 monitors an optical transmission signal in a loop optical transmission line and awaits the transmission signal till a non-signal state corresponding to a delimiter of the signal. When the non-signal state is detected, the 1st 2X2 optical switch 3 is brought into cross-state immediately and an optical signal packet having a header addressed to other node is led to an optical delay line 5 and a 2nd 2X2 optical switch 4 is brought into the cross-state and an output electric signal of the transmitter 17 is converted into an optical signal by using an electric/optic converter 7 and the optical signal is led to an optical fiber 8. Thus, the register insertion access control is attained without opto-electric conversion and electric/optic conversion to an optical signal packet passing through a node.

公开(公告)号：JPH03162191A

公开(公告)日：1991-07-12

申请号：JP30403389

申请日：1989-11-21

Applicant: NEC CORP

Inventor： KAJITANI SHUNICHI

IPC: H04N9/74

Abstract: PURPOSE:To generate a rainbow color in which a luminance component varies as well by providing a color control signal generation circuit to generate a color control signal by which a chrominance component and the luminance component are changed at the same time. CONSTITUTION:The color control signal generation circuit 1 is constituted by using a ROM manufactured so that the luminance component is changed continuously in accordance with each chrominance signal so as to correspond to the change of the values of B-Y, R-Y of the chrominance components or the ROM manufactured so that three chrominance signals of R, G, B are changed. By inputting the color control signal generated in this way, a chrominance signal variable circuit 2 generates the chrominance signals varying continuously, and outputs them to an output terminal 3. Thus, the luminance component can be changed together with the chrominance component, and yellow and blue can be made clear.

公开(公告)号：JPS6393280A

公开(公告)日：1988-04-23

申请号：JP23948986

申请日：1986-10-08

Applicant: NEC CORP

Inventor： KAJITANI SHUNICHI ,  TAGAMI HIROYASU

IPC: H04N5/262

Abstract: PURPOSE:To operate a mirror loop any number of times by providing a video specific effect device with a freeze control circuit which drives and controls a digital specific effect generator by the preset number of times of loop. CONSTITUTION:A multiplier 6 multiplies an input video signal (a) supplied from an input terminal 1 by a constant supplied from a control signal generator circuit 4, and the multiplied signal is supplied to the 2nd input terminal of an adder 7. It adds signals outputted from multipliers 5 and 6, and the added signals are outputted as an output video signal (b) to an output terminal 8. At that time the freeze control circuit 10 controls the number of times that the digital specific effect generator DVE 2 operates the loop. If '1' is set to the freeze control circuit 10, a video expressed by the output video signal (b) ends up as figure b1 shows. When '2' is set to the freeze control circuit 10, a video expressed by the output video signal (b) ends up as figure b2 shows.