公开(公告)号：US20020008316A1

公开(公告)日：2002-01-24

申请号：US09905141

申请日：2001-07-13

Applicant: NEC Corporation

Inventor： Takashi Miyazaki

IPC: H01L023/053

CPC classification number: H01L21/561 ,  H01L21/563 ,  H01L23/36 ,  H01L23/3677 ,  H01L23/3735 ,  H01L23/3737 ,  H01L23/4334 ,  H01L24/29 ,  H01L24/97 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/274 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/83192 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/15787 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/05599

Abstract: In a semiconductor device having a heat spreader attached thereto, a semiconductor chip is mounted on a multi-layer wiring substrate via an electrode pad and an insulating resin. The sides of the semiconductor chip on the substrate are sealed with the insulating resin, and a copper paste film contacted to the exposed surface of the semiconductor chips are formed. The copper paste film functions as a heat spreader.

Abstract translation: 在具有安装有散热器的半导体装置中，通过电极焊盘和绝缘树脂将半导体芯片安装在多层布线基板上。 基板上的半导体芯片的侧面被绝缘树脂密封，并且形成与半导体芯片的暴露表面接触的铜浆膜。 铜膏膜用作散热器。

公开(公告)号：US20010010945A1

公开(公告)日：2001-08-02

申请号：US09770458

申请日：2001-01-29

Applicant: NEC CORPORATION

Inventor： Takashi Miyazaki

IPC: H01L021/44 ,  H01L021/48

CPC classification number: H01L21/568 ,  H01L21/561 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3731 ,  H01L23/3737 ,  H01L24/11 ,  H01L24/12 ,  H01L24/96 ,  H01L24/97 ,  H01L2221/68377 ,  H01L2224/04105 ,  H01L2224/05567 ,  H01L2224/05573 ,  H01L2224/12105 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2224/75252 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/18161 ,  H01L2224/81 ,  H01L2224/05599

Abstract: A semiconductor device includes a passivation film (19) having opening portions through which an electrode pads (18) formed on a semiconductor chip (21) are exposed, projecting electrode portions (20) whose one end faces are connected to the electrode pads (18) through the opening portions, post electrode portions (16A) through which the other end faces of the projecting electrode portions (20) and the metal bumps (26) are connected to each other, and an insulating resin layer (13) having elasticity which covers the post electrode portions (16A), the projecting electrode portions (20) and the passivation film (19) with the exception of the end faces of the post electrode portions (16A).

Abstract translation: 半导体器件包括具有开口部分的钝化膜（19），形成在半导体芯片（21）上的电极焊盘（18）暴露在其中，一端面的电极部分（20）连接到电极焊盘 ）通过开口部分，突出电极部分（20）的另一个端面和金属凸块（26）彼此连接的电极部分（16A）和具有弹性的绝缘树脂层（13） 除了柱状电极部分（16A）的端面之外，还覆盖电极部分（16A），突出电极部分（20）和钝化膜（19）。

公开(公告)号：US20020171152A1

公开(公告)日：2002-11-21

申请号：US10147903

申请日：2002-05-20

Applicant: NEC CORPORATION

Inventor： Takashi Miyazaki

IPC: H01L023/48 ,  H01L023/52 ,  H01L029/40

CPC classification number: H01L21/568 ,  H01L21/563 ,  H01L23/3107 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/04105 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05571 ,  H01L2224/11 ,  H01L2224/11003 ,  H01L2224/1147 ,  H01L2224/12105 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2224/73203 ,  H01L2224/75252 ,  H01L2224/75743 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H05K3/3436 ,  H05K3/3463 ,  H05K2201/0379 ,  H05K2201/1025 ,  H05K2201/10977 ,  H05K2201/10992 ,  H05K2203/0338 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2224/05647 ,  H01L2924/00014 ,  H01L2224/05655 ,  H01L2224/05111

Abstract: There are provided a flip-chip-type semiconductor device and a manufacturing method thereof that can sufficiently reduce stress generated in the connecting portions between a semiconductor chip and a mounting substrate, and can achieve excellent mounting reliability. A pad electrode is selectively formed on the surface of a semiconductor chip, conductive post including at least two conductive layers, which have different materials each other, on the pad electrode, and bump electrode is formed on the conductive post. The bump electrode is connected to a mounting substrate, and the pad electrode is electrically connected to the mounting substrate. The conductive post is formed by forming first conductive layer and second conductive layer on the first conductive layer selectively on a base material (temporary substrate), electrically connecting the first and second conductive layers to the pad electrode, and thereafter separating the temporary substrate from the first conductive layer.

Abstract translation: 提供了可以充分减少在半导体芯片和安装基板之间的连接部分产生的应力的倒装芯片型半导体器件及其制造方法，并且可以实现优良的安装可靠性。 在焊盘电极上，在半导体芯片的表面上选择性地形成焊盘电极，所述导电柱包括至少两个具有不同材料的导电层，并且在导电柱上形成凸起电极。 凸起电极连接到安装基板，并且焊盘电极电连接到安装基板。 导电柱通过在第一导电层上选择性地在基材（临时基板）上形成第一导电层和第二导电层，将第一和第二导电层电连接到焊盘电极，然后将临时基板从 第一导电层。