公开(公告)号：WO2017059055A1

公开(公告)日：2017-04-06

申请号：PCT/US2016/054415

申请日：2016-09-29

Applicant: NETAPP, INC.

Inventor： BANERJEE, Arindam ,  HUMLICEK, Don ,  TERRILL, Scott

IPC: G06F11/10 ,  G06F12/02 ,  G06F12/06 ,  G06F12/08

CPC classification number: G06F12/0804 ,  G06F12/0868 ,  G06F12/0891 ,  G06F12/12 ,  G06F12/126 ,  G06F2212/604

Abstract: Systems and techniques for cache management are disclosed that provide improved cache performance by prioritizing particular storage stripes for cache flush operations. The systems and techniques may also leverage features of the storage devices to provide atomicity without the overhead of inter-controller mirroring. In some embodiments, the systems and techniques include a storage controller that stores data in a cache. The data is associated with one or more sectors of a storage stripe that is defined over plurality of storage devices. The storage controller identifies a locality of dirty sectors of the one or more sectors, classifies the storage stripe into a category based on the locality, provides a category ordering of the category relative to at least one other category, and flushes the storage stripe from the cache to the plurality of storage devices according to the category ordering.

Abstract translation: 公开了用于高速缓存管理的系统和技术，其通过对用于高速缓存刷新操作的特定存储条带进行优先级来提供改进的高速缓 系统和技术还可以利用存储设备的特征来提供原子性，而不需要控制器间镜像的开销。 在一些实施例中，系统和技术包括将数据存储在高速缓存中的存储控制器。 数据与在多个存储设备上定义的存储条带的一个或多个扇区相关联。 存储控制器识别一个或多个扇区的脏扇区的位置，基于该位置将存储条带分类为类别，提供类别相对于至少一个其他类别的类别顺序，并且从 根据类别排序向多个存储设备缓存。

公开(公告)号：WO2017035488A1

公开(公告)日：2017-03-02

申请号：PCT/US2016/049051

申请日：2016-08-26

Applicant: NETAPP, INC.

Inventor： PROSCH, Kent ,  WEBER, Matthew ,  BANERJEE, Arindam ,  MCDAVITT, Ben

IPC: G06F9/46 ,  G06F9/48 ,  G06F9/50 ,  G06F11/00 ,  G06F11/07 ,  G06F15/80 ,  H04L12/803

CPC classification number: G06F9/4812 ,  G06F9/5088 ,  G06F13/24

Abstract: A method for migration of operations between CPU cores, the method includes: processing, by a source core, one or more tasks and one or more interrupt service routines; accessing a mapping corresponding to a task of the one or more tasks and an interrupt service routine of the one or more interrupt service routines; identifying, based on the mapping, a target core that corresponds to the task and the interrupt service routine; blocking the task from being processed by the source core in response to identifying the target core; in response to identifying the target core, disabling an interrupt corresponding to the interrupt service routine; in response to identifying the target core, assigning the task and the interrupt to the target core; after assigning the interrupt to the target core, enabling the interrupt; and after assigning the task to the target core, processing the task by the target core.

Abstract translation: 一种用于在CPU核心之间迁移操作的方法，所述方法包括：由源核心处理一个或多个任务和一个或多个中断服务例程; 访问对应于所述一个或多个任务的任务的映射和所述一个或多个中断服务例程的中断服务程序; 基于所述映射来识别与所述任务和所述中断服务程序相对应的目标核心; 响应于识别目标核心，阻止任务被源核心处理; 响应于识别目标核心，禁用与中断服务程序相对应的中断; 响应于识别目标核心，将任务和中断分配给目标核心; 在将中断分配给目标内核后，启用中断; 并且在将任务分配给目标核心之后，由目标核心处理该任务。

公开(公告)号：WO2016057537A1

公开(公告)日：2016-04-14

申请号：PCT/US2015/054275

申请日：2015-10-06

Applicant: NETAPP, INC.

Inventor： BANERJEE, Arindam ,  HUMLICEK, Donald R.

IPC: G06F12/00

CPC classification number: G06F12/084 ,  G06F3/061 ,  G06F3/0644 ,  G06F3/0673 ,  G06F12/0864 ,  G06F12/0873 ,  G06F2212/1021 ,  G06F2212/1044 ,  G06F2212/312 ,  G06F2212/604 ,  G06F2212/608

Abstract: Methods and systems for managing caching mechanisms in storage systems are provided where a global cache management function manages multiple independent cache pools and a global cache pool. As an example, the method includes: splitting a cache storage into a plurality of independently operating cache pools, each cache pool comprising storage space for storing a plurality of cache blocks for storing data related to an input/output ("I/O") request and metadata associated with each cache pool; receiving the I/O request for writing a data; operating a hash function on the I/O request to assign the I/O request to one of the plurality of cache pools; and writing the data of the I/O request to one or more of the cache blocks associated with the assigned cache pool. In an aspect, this allows efficient I/O processing across multiple processors simultaneously.

Abstract translation: 提供了用于管理存储系统中的缓存机制的方法和系统，其中全局高速缓存管理功能管理多个独立的缓存池和全局缓存池。 作为示例，该方法包括：将高速缓存存储器分割成多个独立操作的高速缓存池，每个高速缓存池包括用于存储用于存储与输入/输出（“I / O”）有关的数据的多个高速缓存块的存储空间， 与每个缓存池相关联的请求和元数据; 接收写入数据的I / O请求; 在所述I / O请求上操作散列函数以将所述I / O请求分配给所述多个缓存池中的一个; 以及将I / O请求的数据写入与所分配的高速缓存池相关联的一个或多个缓存块。 在一个方面，这允许同时跨多个处理器进行高效的I / O处理。

公开(公告)号：EP3341839A1

公开(公告)日：2018-07-04

申请号：EP16840221.2

申请日：2016-08-26

Applicant: NetApp, Inc.

Inventor： PROSCH, Kent ,  WEBER, Matthew ,  BANERJEE, Arindam ,  MCDAVITT, Ben

IPC: G06F9/46 ,  G06F9/48 ,  G06F9/50 ,  G06F11/00 ,  G06F11/07 ,  G06F15/80 ,  H04L12/803

CPC classification number: G06F9/4812 ,  G06F9/4856 ,  G06F9/5088 ,  G06F13/24

Abstract: A method for migration of operations between CPU cores, the method includes: processing, by a source core, one or more tasks and one or more interrupt service routines; accessing a mapping corresponding to a task of the one or more tasks and an interrupt service routine of the one or more interrupt service routines; identifying, based on the mapping, a target core that corresponds to the task and the interrupt service routine; blocking the task from being processed by the source core in response to identifying the target core; in response to identifying the target core, disabling an interrupt corresponding to the interrupt service routine; in response to identifying the target core, assigning the task and the interrupt to the target core; after assigning the interrupt to the target core, enabling the interrupt; and after assigning the task to the target core, processing the task by the target core.

公开(公告)号：WO2017019901A1

公开(公告)日：2017-02-02

申请号：PCT/US2016/044559

申请日：2016-07-28

Applicant: NETAPP, INC.

Inventor： BANERJEE, Arindam ,  JESS, Martin

IPC: G06F9/455

CPC classification number: G06F9/45558 ,  G06F12/084 ,  G06F12/0895 ,  G06F2009/45562 ,  G06F2009/45579 ,  G06F2212/1032 ,  G06F2212/50 ,  G06F2212/604

Abstract: Systems, devices, and methods are provided for sharing host resources in a multiprocessor storage array, the multiprocessor storage array running controller firmware designed for a uniprocessor environment. In some aspects, one or more virtual machines can be initialized by a virtual machine manager or a hypervisor in the storage array system. Each of the one or more virtual machines implement an instance of the controller firmware designed for a uniprocessor environment. The virtual machine manager or hypervisor can assign processing devices within the storage array system to each of the one or more virtual machines. The virtual machine manager or hypervisor can also assign virtual functions to each of the virtual machines. The virtual machines can concurrently access one or more I/O devices, such as physical storage devices, by writing to and reading from the respective virtual functions.

Abstract translation: 提供系统，设备和方法用于在多处理器存储阵列中共享主机资源，多处理器存储阵列运行为单处理器环境设计的控制器固件。 在一些方面，可以由存储阵列系统中的虚拟机管理器或管理程序来初始化一个或多个虚拟机。 一个或多个虚拟机中的每一个实现为单处理器环境设计的控制器固件的实例。 虚拟机管理器或管理程序可以将存储阵列系统内的处理设备分配给一个或多个虚拟机中的每一个。 虚拟机管理器或管理程序也可以为每个虚拟机分配虚拟功能。 虚拟机可以通过写入和读取各个虚拟功能来同时访问诸如物理存储设备的一个或多个I / O设备。

公开(公告)号：EP3329368A1

公开(公告)日：2018-06-06

申请号：EP16831374.0

申请日：2016-07-28

Applicant: NetApp, Inc.

Inventor： BANERJEE, Arindam ,  JESS, Martin

IPC: G06F9/455

CPC classification number: G06F9/45558 ,  G06F12/084 ,  G06F12/0895 ,  G06F2009/45562 ,  G06F2009/45579 ,  G06F2212/1032 ,  G06F2212/50 ,  G06F2212/604

Abstract: Systems, devices, and methods are provided for sharing host resources in a multiprocessor storage array, the multiprocessor storage array running controller firmware designed for a uniprocessor environment. In some aspects, one or more virtual machines can be initialized by a virtual machine manager or a hypervisor in the storage array system. Each of the one or more virtual machines implement an instance of the controller firmware designed for a uniprocessor environment. The virtual machine manager or hypervisor can assign processing devices within the storage array system to each of the one or more virtual machines. The virtual machine manager or hypervisor can also assign virtual functions to each of the virtual machines. The virtual machines can concurrently access one or more I/O devices, such as physical storage devices, by writing to and reading from the respective virtual functions.