ROBUST HIGH ASPECT RATIO SEMICONDUCTOR DEVICE
    2.
    发明申请
    ROBUST HIGH ASPECT RATIO SEMICONDUCTOR DEVICE 审中-公开
    稳定的高倍率半导体器件

    公开(公告)号:WO2010038174A1

    公开(公告)日:2010-04-08

    申请号:PCT/IB2009/054178

    申请日:2009-09-24

    Abstract: The invention relates to an semiconductor device comprising a first surface and neighboring first and second electric elements arranged on the first surface, in which each of the first and second elements extends from the first surface in a first direction, the first element having a cross section substantially perpendicular to the first direction and a sidewall surface extending at least partially in the first direction, wherein the sidewall surface comprises a first section and a second section adjoining the first section along a line extending substantially parallel to the first direction, wherein the first and second sections are placed at an angle with respect to each other for providing an inner corner wherein the sidewall surface at the inner corner is, at least partially, arranged at a constant distance R from a facing part of the second element for providing a mechanical reinforcement structure at the inner corner.

    Abstract translation: 本发明涉及一种半导体器件,包括第一表面和相邻的第一和第二电气元件,其布置在第一表面上,其中第一和第二元件中的每一个元件在第一方向上从第一表面延伸,第一元件具有横截面 基本上垂直于所述第一方向的侧壁表面和至少部分地沿所述第一方向延伸的侧壁表面,其中所述侧壁表面包括沿着基本上平行于所述第一方向延伸的线邻接所述第一部分的第一部分和第二部分,其中, 第二部分相对于彼此以一定角度放置以提供内角,其中内拐角处的侧壁表面至少部分地布置在距离第二元件的面对部分的恒定距离R处,以提供机械加强件 结构在内角。

    LOW-FREQUENCY FILTER COMPRISING MAXWELL-WAGNER STACK
    4.
    发明申请
    LOW-FREQUENCY FILTER COMPRISING MAXWELL-WAGNER STACK 审中-公开
    包含MAXWELL-WAGNER STACK的低频滤波器

    公开(公告)号:WO2010103452A1

    公开(公告)日:2010-09-16

    申请号:PCT/IB2010/050985

    申请日:2010-03-08

    CPC classification number: H01L28/40

    Abstract: The present invention relates to an electric low-pass filter, comprising a layer stack formed by a first electrode layer, a first dielectric layer adjacent to the first electrode layer, a second dielectric layer adjacent to the first dielectric layer, and a second electrode layer adjacent to the second dielectric layer. The first dielectric layer is made of a material and has a layer thickness, which in combination allow a tunellingof first charge carriers of a first charge-carrier polarity from the first electrode layer through the first dielectric layer to an interface between the first and second dielectric layers, under application of a first tunneling voltage of a first voltage polarity between the first and second electrode layers, and a tunneling of second charge carriers of an opposite second charge-carrier polarity from the first electrode layer through the first delectric layer to the interface between the first and second dielectric layers under application of a second tunneling voltage of a second voltage polarity between the first and second electrodes, which second voltage polarity is oppsosite to the first voltage polarity. The second charge carriers have a second charge-carrier mobility in the first dielectric material, which is lower than the first charge-carrier mobility of the first charge carriers.

    Abstract translation: 本发明涉及一种电气低通滤波器,包括由第一电极层形成的层叠层,与第一电极层相邻的第一电介质层,与第一电介质层相邻的第二电介质层和第二电极层 邻近第二电介质层。 第一电介质层由材料制成并且具有层厚度,其组合允许第一电荷载体极性的第一电荷载流子从第一电极层通过第一介电层向第一和第二电介质之间的界面 在第一和第二电极层之间施加第一电压极性的第一隧道电压的第二电荷载流子和相反的第二电荷载流子极性的第二电荷载流子从第一电极层穿过第一电介质层到界面 在第一和第二电极之间施加第二电压极性的第二隧穿电压,该第二电压极性与第一电压极性相对。 第二电荷载体在第一介电材料中具有第二电荷载流子迁移率,其低于第一载流子的第一电荷载流子迁移率。

    2D OR 3D ELECTROCHEMICAL DEVICE EMPLOYING COMPOSIT ACTIVE ELECTRODES
    6.
    发明申请
    2D OR 3D ELECTROCHEMICAL DEVICE EMPLOYING COMPOSIT ACTIVE ELECTRODES 审中-公开
    使用组合物活性电极的2D或3D电化学装置

    公开(公告)号:WO2010032159A1

    公开(公告)日:2010-03-25

    申请号:PCT/IB2009/053920

    申请日:2009-09-08

    Abstract: The present invention relates to a modified rechargeable Li- ion solid- state battery design that is integrated in 3D silicon. Currently, several designs of 2D or 3D integrated batteries have already been described and disclosed in the prior art. Novel concepts (3D integration) of all- so lid- state rechargeable thin film Li-ion batteries were previously described in patent WO2005/O27245A2. These energy storage devices can be advantageously used as a power supply for many applications such as OLED devices, presence detection, implantables, smart cards and hearing aids. One of the problems associated with this type of solid-state batteries is the volume expansion/contraction of the active electrodes (anode and cathode) resulting from Lithium intercalation into/from the aforementioned electrodes. This volume change will inevitably cause stress and thus possibly compromise the mechanical stability of the device, resulting in lifetime degradation. Especially in high aspect ratio structures, like trenches, pillar or holes, high-curvature regions will cause problems. To reduce this volume expansion the active materials, comprising the anode and cathode, must be carefully chosen (chemical electrode matching) and their geometries matched (geometric electrode matching).

    Abstract translation: 本发明涉及集成在3D硅中的改进的可充电锂离子固态电池设计。 目前,现有技术已经描述和公开了2D或3D集成电池的几种设计。 以前在专利WO2005 / O27245A2中描述了所有盖状态可再充电薄膜锂离子电池的新概念(3D集成)。 这些能量存储装置可以有利地用作许多应用的电源,例如OLED器件,存在检测,可植入物,智能卡和助听器。 与这种类型的固态电池相关的问题之一是由插入到上述电极中的锂引起的活性电极(阳极和阴极)的体积膨胀/收缩。 这种体积变化将不可避免地导致应力,从而可能损害装置的机械稳定性,导致寿命降低。 特别是在高宽比结构中,如沟槽,柱或孔,高曲率区域会引起问题。 为了减小体积膨胀,必须仔细选择包括阳极和阴极的活性材料(化学电极匹配)及其几何形状(几何电极匹配)。

    A CAPACITIVE DC-DC CONVERTER
    7.
    发明申请
    A CAPACITIVE DC-DC CONVERTER 审中-公开
    电容式DC-DC转换器

    公开(公告)号:WO2010052610A1

    公开(公告)日:2010-05-14

    申请号:PCT/IB2009/054773

    申请日:2009-10-28

    CPC classification number: H02M3/07

    Abstract: A charge-pump capacitive DC-DC converter (200) is disclosed, which includes a reconfigurable charge-pump capacitor array. The DC-DC converter is configured to provide a continuously variable ratio between its input voltage (V in ) and its output voltage (V out ), by means of at least one of the at least one charge-pump capacitors (C21, C22) forming the reconfigurable array being a variable capacitor. In the embodiments, the one or more variable capacitors (C21, C22) may be a ferroelectric capacitor, an anti-ferroelectric capacitor, or other ferrioc capacitor. The DC-DC converter (200) may provide a bias circuit to the capacitor or capacitors, and may further provide a control loop (220, 230). Alternatively, the capacitor may provide a degree of self-control.

    Abstract translation: 公开了一种电荷泵电容式DC-DC转换器(200),其包括可重新配置的电荷泵电容器阵列。 DC-DC转换器被配置为通过形成至少一个的至少一个电荷泵电容器(C21,C22)中的至少一个来提供其输入电压(Vin)和其输出电压(Vout)之间的无级变比 可重构阵列是可变电容器。 在这些实施例中,一个或多个可变电容器(C21,C22)可以是铁电电容器,反铁电电容器或其他铁电电容器。 DC-DC转换器(200)可以向电容器或电容器提供偏置电路,并且还可以提供控制回路(220,230)。 或者,电容器可以提供一定程度的自我控制。

    METHOD OF PLATING THROUGH WAFER VIAS IN A WAFER FOR 3D PACKAGING
    8.
    发明申请
    METHOD OF PLATING THROUGH WAFER VIAS IN A WAFER FOR 3D PACKAGING 审中-公开
    通过WAVER VIEA在三维包装中放置的方法

    公开(公告)号:WO2010041165A1

    公开(公告)日:2010-04-15

    申请号:PCT/IB2009/054233

    申请日:2009-09-28

    Abstract: Therefore, a method of plating wafer via holes in a wafer is provided. A substrate (200) having a first and second side and a plurality of wafer via holes (210) is provided. Each via hole comprises a first and second end extending between the first and second side. A first seed layer (220) is deposited on the first side of the 5 wafer (200). A foil (250) is applied on the first seed layer (220) of the wafer closing the first ends of the plurality of wafer via holes (210). The second side of the wafer (200) is electro-chemically plated and the foil (250) is removed.

    Abstract translation: 因此,提供了在晶片中电镀晶片通孔的方法。 提供了具有第一和第二侧面以及多个晶片通孔(210)的基板(200)。 每个通孔包括在第一和第二侧之间延伸的第一和第二端。 第一种子层(220)沉积在5晶片(200)的第一侧上。 箔片(250)被施加在封闭多个晶片通孔(210)的第一端的晶片的第一晶种层(220)上。 晶片(200)的第二面被电化学镀,并且去除箔(250)。

    A CAPACITIVE DC-DC CONVERTER
    9.
    发明公开
    A CAPACITIVE DC-DC CONVERTER 审中-公开
    DC功率转换器的电荷泵

    公开(公告)号:EP2345142A1

    公开(公告)日:2011-07-20

    申请号:EP09756836.4

    申请日:2009-10-28

    Applicant: NXP B.V.

    CPC classification number: H02M3/07

    Abstract: A charge-pump capacitive DC-DC converter (200) is disclosed, which includes a reconfigurable charge-pump capacitor array. The DC-DC converter is configured to provide a continuously variable ratio between its input voltage (V
    in ) and its output voltage (V
    out ), by means of at least one of the at least one charge-pump capacitors (C21, C22) forming the reconfigurable array being a variable capacitor. In the embodiments, the one or more variable capacitors (C21, C22) may be a ferroelectric capacitor, an anti-ferroelectric capacitor, or other ferrioc capacitor. The DC-DC converter (200) may provide a bias circuit to the capacitor or capacitors, and may further provide a control loop (220, 230). Alternatively, the capacitor may provide a degree of self-control.

    ROBUST HIGH ASPECT RATIO SEMICONDUCTOR DEVICE
    10.
    发明公开
    ROBUST HIGH ASPECT RATIO SEMICONDUCTOR DEVICE 有权
    稳健半导体元件宽高比HIGH

    公开(公告)号:EP2334589A1

    公开(公告)日:2011-06-22

    申请号:EP09787279.0

    申请日:2009-09-24

    Applicant: NXP B.V.

    Abstract: The invention relates to an semiconductor device comprising a first surface and neighboring first and second electric elements arranged on the first surface, in which each of the first and second elements extends from the first surface in a first direction, the first element having a cross section substantially perpendicular to the first direction and a sidewall surface extending at least partially in the first direction, wherein the sidewall surface comprises a first section and a second section adjoining the first section along a line extending substantially parallel to the first direction, wherein the first and second sections are placed at an angle with respect to each other for providing an inner corner wherein the sidewall surface at the inner corner is, at least partially, arranged at a constant distance R from a facing part of the second element for providing a mechanical reinforcement structure at the inner corner.

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