公开(公告)号：WO2008035261A1

公开(公告)日：2008-03-27

申请号：PCT/IB2007/053719

申请日：2007-09-14

Applicant: NXP B.V. ,  NEUILLY, Francois ,  CHEVRIE, David, D., R. ,  YON, Dominique

Inventor： NEUILLY, Francois ,  CHEVRIE, David, D., R. ,  YON, Dominique

IPC: H01L21/768 ,  H01L23/48

CPC classification number: H01L21/76898 ,  H01L23/481 ,  H01L2224/16225 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/3011 ,  H01L2224/0401

Abstract: The present invention provides a method for making a vertical interconnect through a substrate. The method makes use of a sacrificial buried layer 220 arranged in between the first side 202 and the second side 204 of a substrate 200. After having etched trenches 206 and 206' from the first side, the sacrificial buried layer 220 functions as a stop layer during etching of holes 218 and 218' from the second side, therewith protecting the trenches from damage during overetch of the holes. The etching of trenches is completely decoupled from etching of the holes providing several advantages for process choice and device manufacture. After removing part of the sacrificial buried layer to interconnect the trenches and the holes, the resulting vertical interconnect hole is filled to form a vertical interconnect.

Abstract translation: 本发明提供一种通过衬底制造垂直互连的方法。 该方法利用布置在基板200的第一侧202和第二侧204之间的牺牲掩埋层220.在从第一侧蚀刻了沟槽206和206'之后，牺牲掩埋层220用作停止层 在从第二侧蚀刻孔218和218'期间，从而在孔的过程中保护沟槽免受损坏。 沟槽的蚀刻与孔的蚀刻完全分离，为工艺选择和器件制造提供了几个优点。 在去除部分牺牲掩埋层以互连沟槽和孔之后，所得到的垂直互连孔被填充以形成垂直互连。

公开(公告)号：WO2008001253A3

公开(公告)日：2008-01-03

申请号：PCT/IB2007/052270

申请日：2007-06-14

Applicant: NXP B.V. ,  SWOROWSKI, Marc ,  CHEVRIE, David, D., R. ,  PHILIPPE, Pascal

Inventor： SWOROWSKI, Marc ,  CHEVRIE, David, D., R. ,  PHILIPPE, Pascal

IPC: B81C1/00

Abstract: Method of manufacturing a MEMS device integrated in a silicon substrate. In parallel to the manufacturing of the MEMS device passive components as trench capacitors with a high capacitance density can be processed. The method is especially suited for MEMS resonators with resonance frequencies in the range of 10 MHz.

公开(公告)号：EP2038207A2

公开(公告)日：2009-03-25

申请号：EP07766754.1

申请日：2007-06-14

Applicant: NXP B.V.

Inventor： SWOROWSKI, Marc ,  CHEVRIE, David, D., R. ,  PHILIPPE, Pascal

IPC: B81C1/00

CPC classification number: B81C1/00198 ,  B81B2201/0292 ,  H03H3/0072

Abstract: Method of manufacturing a MEMS device integrated in a silicon substrate. In parallel to the manufacturing of the MEMS device passive components as trench capacitors with a high capacitance density can be processed. The method is especially suited for MEMS resonators with resonance frequencies in the range of 10 MHz.