公开(公告)号：GB2379531A

公开(公告)日：2003-03-12

申请号：GB0211310

申请日：2002-05-17

Applicant: PACE MICRO TECH PLC

Inventor： HEMMING SIMON ,  BALDOCK MARK

IPC: G06F9/318 ,  G06F12/06 ,  G06F13/32 ,  G06F12/04

Abstract: A method for extending the instruction set of a central processing unit (CPU). Each memory location in the CPU is identified by a unique address consisting of a plurality of bits in an address word. The method includes the steps of identifying and retrieving a portion of data from the memory, manipulating the portion of data and saving the result. One or more bits in the address word are used to ensure that the method is performed in an uninterrupted manner. The address word bits used could be from a redundant portion of the address word, or could be the least or most significant bits, or from some intermediate portion. The number of bits used could be calculated using the formula n = log(w/8)/log(2), where w is the word length. The address bits could specify binary operations eg AND, OR, XOR or NOT to be applied to the data. The method could be as hardware or as part of the operating system and could be use to regulate access to a shared resource.

公开(公告)号：GB2379531B

公开(公告)日：2005-05-25

申请号：GB0211310

申请日：2002-05-17

Applicant: PACE MICRO TECH PLC

Inventor： HEMMING SIMON ,  BALDOCK MARK

IPC: G06F9/318 ,  G06F12/06 ,  G06F13/32 ,  G06F12/04