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公开(公告)号:DE602004004404D1
公开(公告)日:2007-03-08
申请号:DE602004004404
申请日:2004-07-27
Applicant: PHILIPS INTELLECTUAL PROPERTY
Inventor: TOLLE GEORG , DUERBAUM THOMAS , SAUERLAENDER GEORG , LOPEZ TONI
IPC: H03K17/0412 , H03K17/00 , H03K17/0416
Abstract: Resonant gate driver circuits provide for an efficient switching of, for example, a MOSFET. However, often an operation of the resonant gate driver circuit does not allow for an application where high switching frequencies are required. According to the present invention, a pre-charging of the inductor of the resonant gate drive circuit is performed. This allows for a highly energy efficient and fast operation of the MOSFET.
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公开(公告)号:DE602004004404T2
公开(公告)日:2007-11-08
申请号:DE602004004404
申请日:2004-07-27
Applicant: PHILIPS INTELLECTUAL PROPERTY
Inventor: TOLLE TOBIAS , DUERBAUM THOMAS , SAUERLAENDER GEORG , LOPEZ TONI
IPC: H03K17/0412 , H03K17/00 , H03K17/0416
Abstract: Resonant gate driver circuits provide for an efficient switching of, for example, a MOSFET. However, often an operation of the resonant gate driver circuit does not allow for an application where high switching frequencies are required. According to the present invention, a pre-charging of the inductor of the resonant gate drive circuit is performed. This allows for a highly energy efficient and fast operation of the MOSFET.
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公开(公告)号:WO2007138509A3
公开(公告)日:2008-03-06
申请号:PCT/IB2007051806
申请日:2007-05-14
Applicant: KONINKL PHILIPS ELECTRONICS NV , PHILIPS INTELLECTUAL PROPERTY , LOPEZ TONI , ELFERICH REINHOLD
Inventor: LOPEZ TONI , ELFERICH REINHOLD
CPC classification number: H02M1/08 , H03K17/0822 , H03K17/166 , H03K17/687 , H03K2217/0036
Abstract: A switching circuit arrangement (100) comprises a field effect transistor (40) and circuitry (50, 52, 54, 60, 62) for biasing the gate voltage of the field effect transistor (40), in particular forcing the gate voltage of the field effect transistor (40) under a certain threshold, in particular under a certain positive threshold level. In embodiments, reverse recovery as well as gate bounce are simultaneously mitigated. In one embodiment, the biasing circuitry comprises a biasing diode (52) connected in series to the gate (G) of the field effect transistor (40) to bias the gate voltage of the field effect transistor (40), as well as a clamping field effect transistor unit (62) connected between the gate (G) of the field effect transistor (40) and the source (S) of the field effect transistor (40) to force the gate voltage of the field effect transistor (40) under a certain threshold, in particular under a certain positive threshold level.
Abstract translation: 开关电路装置(100)包括用于偏置场效应晶体管(40)的栅极电压的电场(50,52,54,60,62)的场效应晶体管(40),特别是迫使栅极电压 场效应晶体管(40)处于特定阈值下,特别是在一定的正阈值电平下。 在实施例中,反向恢复以及门反弹同时被减轻。 在一个实施例中,偏置电路包括与场效应晶体管(40)的栅极(G)串联连接以偏置场效应晶体管(40)的栅极电压的偏置二极管(52)以及钳位 场效应晶体管单元(62)连接在场效应晶体管(40)的栅极(G)和场效应晶体管(40)的源极(S)之间,以迫使场效应晶体管(40)的栅极电压在 特定的阈值水平。
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