公开(公告)号：EP1489586A4

公开(公告)日：2009-01-21

申请号：EP02775292

申请日：2002-10-03

Applicant: PIONEER CORP

Inventor： YOSHIOKA TOSHIHIRO

IPC: G09G3/20 ,  G09G3/28 ,  G09G3/288 ,  G09G3/291 ,  G09G3/292 ,  G09G3/293 ,  G09G3/294 ,  G09G3/298 ,  H01J11/12 ,  H01J11/14 ,  H01J11/24 ,  H01J11/26 ,  H01J11/32 ,  H01J11/36 ,  H01J11/44 ,  H01J11/50 ,  H04N5/66 ,  H01J11/00 ,  H01J11/02

CPC classification number: H01J11/12 ,  G09G3/2037 ,  G09G3/2927 ,  G09G3/294 ,  G09G2310/066 ,  G09G2320/0238 ,  G09G2320/0271 ,  H01J11/24 ,  H01J11/36

Abstract: A plasma display panel and its driving method are provided, which is capable of improving high speed performance and reducing the necessary voltage for a selective discharge for switching a discharge cell and preferably of suppressing a brightness in a black display and making it easy to modulate the minimum brightness for improving the quality of image. A scanning pulse voltage and a high-level data pulse voltage are so set that even if a data pulse of a discharge cell is low level or this discharge cell is non-selected, then in this non-selected discharge cell, a weak discharge 501 is generated between a low resistive wiring 111b and a stepped portion 203 over a data electrode 210 which are overlapped each other, and if a data pulse of a discharge cell is high level or this discharge cell is selected, then the weak discharge 501 is generated immediately after application of the data pulse before this discharge expends to a position under a transparent electrode 111a, whereby the weak discharge 501 becomes a discharge 502.

公开(公告)号：EP2442623A4

公开(公告)日：2013-08-28

申请号：EP09845758

申请日：2009-06-11

Applicant: PIONEER CORP

Inventor： YOSHIOKA TOSHIHIRO ,  UCHIDA TOSHIHARU

IPC: H05B33/24 ,  H01L51/50 ,  H01L51/52

CPC classification number: H01L51/5265 ,  H01L27/3211 ,  H01L27/322

公开(公告)号：EP2680070A4

公开(公告)日：2017-05-10

申请号：EP11859405

申请日：2011-02-25

Applicant: PIONEER CORP

Inventor： YOSHIOKA TOSHIHIRO ,  HIGUCHI TAKANOBU ,  YOSHIKAWA TAKAMASA

IPC: G03B21/56 ,  G03B21/10 ,  G03B21/62

CPC classification number: G03B21/56 ,  G03B21/10 ,  G03B21/62

公开(公告)号：EP2442622A4

公开(公告)日：2013-08-28

申请号：EP09845757

申请日：2009-06-11

Applicant: PIONEER CORP

Inventor： YOSHIOKA TOSHIHIRO ,  UCHIDA TOSHIHARU

IPC: H05B33/24 ,  H01L51/50

CPC classification number: H01L33/60 ,  H01L51/5265 ,  H05B33/24

Abstract: [PROBLEMS] To provide a technique capable of suppressing luminance variations in a light emitting element having a resonator structure and a display apparatus even when a film thickness deviates from a design value to increase or decrease a resonator optical path length, by way of example. [SOLVING MEANS] A light emitting element includes a resonator structure which has a first reflecting member, a second reflecting member, and a light emission layer placed between the first reflecting member and the second reflecting member, and part of light resonated between the first reflecting member and the second reflecting member is transmitted through the first reflecting member or the second reflecting member in the resonator structure. A wavelength at which a resonator output spectrum from the resonator structure has a maximum value is located between a wavelength at which an inner light emission spectrum of the light emission layer has a maximum value and a wavelength at which relative luminous efficiency has a maximum value.

公开(公告)号：DE60122987T2

公开(公告)日：2007-04-12

申请号：DE60122987

申请日：2001-07-30

Applicant: PIONEER CORP

Inventor： YOSHIOKA TOSHIHIRO ,  FURUTANI TAKASHI

IPC: H01J9/02 ,  H01J9/24 ,  H01J11/12 ,  H01J11/22 ,  H01J11/24 ,  H01J11/26 ,  H01J11/32 ,  H01J11/34 ,  H01J11/36 ,  H01J11/38 ,  H01J11/44 ,  H01J11/50

Abstract: In a plasma display panel, data electrodes (12) are formed parallel to each other on a first substrate (11), and a selection voltage is to be applied to them. A dielectric layer (13) covers a surface of the first substrate (11) to include the data electrodes (12). Linear partitions (30) are formed at a predetermined interval on the first substrate (11) to be parallel to the data electrodes (12). A second substrate opposes the first substrate (11). A closed space between the first and second substrates is filled with a gas. A pair of sustain discharge electrodes are formed on the second substrate to intersect the data electrodes (12), and a discharge voltage is to be applied across them. Intersections of the pair of sustain discharge electrodes and data electrodes (12) form matrix-like discharge cells (100). Stepped partitions (20) are formed at a predetermined interval on the first substrate (11) in a direction intersecting the linear partitions (30), and have heights smaller than those of the linear partitions (30). Notched openings (301) are formed in the linear partitions (30) at intersections of the linear and stepped partitions. A method of manufacturing a plasma display panel is also disclosed.

公开(公告)号：DE60122987D1

公开(公告)日：2006-10-26

申请号：DE60122987

申请日：2001-07-30

Applicant: PIONEER CORP

Inventor： YOSHIOKA TOSHIHIRO ,  FURUTANI TAKASHI

IPC: H01J9/02 ,  H01J9/24 ,  H01J11/12 ,  H01J11/22 ,  H01J11/24 ,  H01J11/26 ,  H01J11/32 ,  H01J11/34 ,  H01J11/36 ,  H01J11/38 ,  H01J11/44 ,  H01J11/50

Abstract: In a plasma display panel, data electrodes (12) are formed parallel to each other on a first substrate (11), and a selection voltage is to be applied to them. A dielectric layer (13) covers a surface of the first substrate (11) to include the data electrodes (12). Linear partitions (30) are formed at a predetermined interval on the first substrate (11) to be parallel to the data electrodes (12). A second substrate opposes the first substrate (11). A closed space between the first and second substrates is filled with a gas. A pair of sustain discharge electrodes are formed on the second substrate to intersect the data electrodes (12), and a discharge voltage is to be applied across them. Intersections of the pair of sustain discharge electrodes and data electrodes (12) form matrix-like discharge cells (100). Stepped partitions (20) are formed at a predetermined interval on the first substrate (11) in a direction intersecting the linear partitions (30), and have heights smaller than those of the linear partitions (30). Notched openings (301) are formed in the linear partitions (30) at intersections of the linear and stepped partitions. A method of manufacturing a plasma display panel is also disclosed.