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    CONDUCTION PATH BEING UNDER FLAT DISPLAY SCREEN SEALING WALL
    2.
    发明专利
    CONDUCTION PATH BEING UNDER FLAT DISPLAY SCREEN SEALING WALL 失效

    公开(公告)号：JPH11327455A

    公开(公告)日：1999-11-26

    申请号：JP8358799

    申请日：1999-03-26

    Applicant: PIXTECH SA

    Inventor： FRAYSSINET THIERRY

    IPC: G09F9/00 ,  H01J5/46 ,  H01J29/92

    Abstract: PROBLEM TO BE SOLVED: To suppress the risk of the leakage between the inside and the outside of a screen which are connected to crossings of grid conductors being under a sealing wall by allowing the grid conductors to include opening operation structures performing their expansions and contractions easily and providing nonlinear conductive parts at electric contact parts. SOLUTION: Grid rows 10 perform opening operations in order to enable expansions and contractions for the gird rows in stead of becoming crossing solid bodies in the lower part of a screen sealing wall 7. As a result, stresses to be imparted on them become minimum. Consequently, in their length parts 30, the grid rows 10 express dispersed openings 31 in order to form nets and the grid rows compensate electric conductions on either of sides of the seal 7. Patterns of the openings 31 formed in areas 30 of the grid rows 10 become so that the rows 10 do not have either of linear conductive parts and the rows perform the compensations in the normal direction of their legths or their widths. Thus, stress propagations which are apt to be developed in the grid rows 10 being the upper part of the sealing wall 7 are more reduced.

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