公开(公告)号：WO2016140723A3

公开(公告)日：2016-10-27

申请号：PCT/US2015065627

申请日：2015-12-14

Applicant: QUALCOMM INC

Inventor： CHEN NAN ,  ZHANG JUNMOU ,  CHEN MIN

IPC: G06F7/58

CPC classification number: G11C11/417 ,  G06F7/588 ,  G11C7/1006

Abstract: One feature pertains to a true random number generator that utilizes the settling time of a bit cell as an entropy source to generate random digital output values. The bit cell may be a static random access memory bit cell. The bit cell's settling time may be converted into a digital output using an analog to digital converter. A plurality of bit cells may serially couple to one another in a ring formation. The bit cell ring can then be enabled such that each bit cell of the plurality of bit cells achieves a settling value that activates the subsequent bit cell in the ring causing it to in turn reach a settling value, and so on. An output node of one of the bit cells in the ring can then be sampled using a flip-flop to generate a continuous stream of random bits.

Abstract translation: 一个特征涉及真正的随机数发生器，其利用位单元的建立时间作为熵源来产生随机数字输出值。 位单元可以是静态随机存取存储器位单元。 位单元的建立时间可以使用模数转换器转换为数字输出。 多个位单元可以以环形形式彼此串联耦合。 然后可以启用位单元环，使得多个位单元中的每个位单元实现稳定值，该稳定值激活环中的后续位单元，从而使其依次达到稳定值，等等。 然后可以使用触发器对环中位单元之一的输出节点进行采样以生成连续的随机位流。