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1.发明专利
公开(公告)号：AU700158B2
公开(公告)日：1998-12-24
申请号：AU4248096
申请日：1995-11-28
Applicant: QUALCOMM INC
Inventor： GILMORE ROBERT P , LARAMIE DANIEL
Abstract: A system and method for using a sectored antenna arrangement within a cellular base station to provide redundant coverage within the surrounding cell is disclosed herein. An antenna feed network connects elements of the sectored antenna arrangement to a set of communication transceivers, wherein the feed network includes a combiner array for combining selected ones of the antenna beams upon failure of one of the communication transceivers. A switch network serves to provide the resultant combined beam to an operative one of the communication transceivers. Alternately, the sectored antenna arrangement includes an antenna array having a plurality of switchable antenna elements, each connected to one of the communication transceivers. The switchable antenna elements project a set of variable-width antenna beams over the plurality of cell sectors. Upon one of the communication transceivers becoming inoperative, an antenna control network operates to adjust beam width of a selected one of the variable-width antenna beams by switching configuration of an associated one of the switchable antenna elements. In another approach each antenna within a primary array is disposed to project a beam over a single sector, while each element within a redundant array is designed to encompass a pair of adjacent sectors. Upon one of the transceivers becoming inoperative, a transceiver nominally assigned to cover a sector neighboring the failed sector is connected to the element within the redundant array encompassing both the failed and neighboring sectors.
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公开(公告)号：FI973654A
公开(公告)日：1997-11-14
申请号：FI973654
申请日：1997-09-10
Applicant: QUALCOMM INC
Inventor： GILMORE ROBERT P
Abstract: A frequency synthesizer which uses a direct digital synthesizer (DDS) to generate a highly accurate periodic signal of a frequency selected from a plurality of reference frequencies. The DDS output signal is bandpass filtered utilizing a clean-up phase lock loop (PLL) to produce a spectrally pure reference signal and promote overall fast settling time. A second or primary phase lock loop, having a much faster settling time than the first PLL, adjusts the frequency of the reference signal generated by the clean-up PLL. In one embodiment, the DDS frequency synthesizer has a digital to analog (DAC) converter coupled to the clean-up PLL. Another embodiment uses a modified DDS (without a DAC or lookup table) and feeds the most significant bit (MSB) or overflow bit from the DAC accumulator into the "clean-up" PLL. In both embodiments, the resulting synthesizer has high spectral purity, fine frequency resolution and a fast settling time. Yet another embodiment uses a switching apparatus to bypass the "clean-up" PLL while it is settling on a new frequency. Once the "clean-up" PLL settles on the new frequency the switches are set to couple the "clean-up" PLL back into the synthesizer apparatus.
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公开(公告)号：CA2222925A1
公开(公告)日：1997-10-09
申请号：CA2222925
申请日：1997-04-01
Applicant: QUALCOMM INC
Inventor： THOMPSON JAMES H , GILMORE ROBERT P
Abstract: A system and method for controlling the strength of a shared resource signal transmitted by the satellite transponder (104) in a satellite communications system. The satellite communications system includes a gateway (102) for transmitting communications signals including a shared resource signal (402), a satellite transponder (104) for relaying (404) the signals to at least one subscriber unit (106A, B, C) (for example, a phone), and at least one subscriber unit (106) for receiving the signals (406). The method includes the steps of receiving the shared resource signal (406), at each subscriber unit (106), via the satellite transponder (104); measuring (408), at each subscriber unit (106), a signal strength for the received shared resource signal; sending the signal strengths to the gateway (410, 102); and adjusting the power of the shared resource signal transmitted by the satellite transponder (418) based on the signal strengths.
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公开(公告)号：DK0521859T3
公开(公告)日：1997-02-03
申请号：DK91903171
申请日：1990-10-22
Applicant: QUALCOMM INC
Inventor： GILMORE ROBERT P
Abstract: A frequency synthesizer which uses a direct digital synthesizer (DDS) to generate a highly accurate periodic signal of a frequency selected from a plurality of reference frequencies. The DDS output signal is bandpass filtered and amplitude limited to reduce spurious noise. In one embodiment, the DDS frequency synthesizer is coupled to a phase lock loop which receives the DDS generated reference signal and a divide-by-N signal for generating an output signal at a frequency determined by the divide-by-N signal. The frequency resolution of the phase lock loop is N times the reference signal. In a second embodiment, the DDS is incorporated within the feedback path of the phase lock loop. An input reference frequency signal is provided to the phase lock loop with the DDS clock signal provided as a function of the phase lock loop output frequency. The DDS receives an input frequency control signal which determines the DDS step size. The synthesizer output frequency is a function of the input reference frequency, the number of bits in the digital word of the frequency control signal and the DDS step size as determined by the frequency control signal. Optional dividers may be provided in the feedback path which may further affect the synthesizer output frequency.
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公开(公告)号：CA2215376A1
公开(公告)日：1996-09-19
申请号：CA2215376
申请日：1996-03-08
Applicant: QUALCOMM INC
Inventor： GILMORE ROBERT P
Abstract: A frequency synthesizer (200) which uses a direct digital synthesizer (DDS) (204) to generate a highly accurate periodic signal. The DDS (204) output signal is bandpass filtered utilizing a clean-up phase lock loop (PLL) (214) to produce a spectrally pure reference signal and promote overall fast settling time. A second or primary phase lock loop (220), having a much faster settling time than the first PLL (214), adjusts the frequency of the reference signal generated by the clean-up PLL (214). In one embodiment, the DDS frequency synthesizer (204) has a digital to analog converter (DAC) (206) coupled to the clean-up PLL (214). Another embodiment (300) feeds the most significant bit (MSB) (310) or overflow bit from the DAC accumulator (306) into the "clean-up" PLL (318). Yet another embodiment (400) uses a switching apparatus to bypass the "clean-up" PLL (410) while it is settling on a new frequency.
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Patent Agency Ranking6.发明专利
公开(公告)号：AU4248096A
公开(公告)日：1996-06-19
申请号：AU4248096
申请日：1995-11-28
Applicant: QUALCOMM INC
Inventor： GILMORE ROBERT P , LARAMIE DANIEL
Abstract: A system and method for using a sectored antenna arrangement within a cellular base station to provide redundant coverage within the surrounding cell is disclosed herein. An antenna feed network connects elements of the sectored antenna arrangement to a set of communication transceivers, wherein the feed network includes a combiner array for combining selected ones of the antenna beams upon failure of one of the communication transceivers. A switch network serves to provide the resultant combined beam to an operative one of the communication transceivers. Alternately, the sectored antenna arrangement includes an antenna array having a plurality of switchable antenna elements, each connected to one of the communication transceivers. The switchable antenna elements project a set of variable-width antenna beams over the plurality of cell sectors. Upon one of the communication transceivers becoming inoperative, an antenna control network operates to adjust beam width of a selected one of the variable-width antenna beams by switching configuration of an associated one of the switchable antenna elements. In another approach each antenna within a primary array is disposed to project a beam over a single sector, while each element within a redundant array is designed to encompass a pair of adjacent sectors. Upon one of the transceivers becoming inoperative, a transceiver nominally assigned to cover a sector neighboring the failed sector is connected to the element within the redundant array encompassing both the failed and neighboring sectors.
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公开(公告)号：FI115936B
公开(公告)日：2005-08-15
申请号：FI973654
申请日：1997-09-10
Applicant: QUALCOMM INC
Inventor： GILMORE ROBERT P
Abstract: A frequency synthesizer which uses a direct digital synthesizer (DDS) to generate a highly accurate periodic signal of a frequency selected from a plurality of reference frequencies. The DDS output signal is bandpass filtered utilizing a clean-up phase lock loop (PLL) to produce a spectrally pure reference signal and promote overall fast settling time. A second or primary phase lock loop, having a much faster settling time than the first PLL, adjusts the frequency of the reference signal generated by the clean-up PLL. In one embodiment, the DDS frequency synthesizer has a digital to analog (DAC) converter coupled to the clean-up PLL. Another embodiment uses a modified DDS (without a DAC or lookup table) and feeds the most significant bit (MSB) or overflow bit from the DAC accumulator into the "clean-up" PLL. In both embodiments, the resulting synthesizer has high spectral purity, fine frequency resolution and a fast settling time. Yet another embodiment uses a switching apparatus to bypass the "clean-up" PLL while it is settling on a new frequency. Once the "clean-up" PLL settles on the new frequency the switches are set to couple the "clean-up" PLL back into the synthesizer apparatus.
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公开(公告)号：BR9911733A
公开(公告)日：2001-04-03
申请号：BR9911733
申请日：1999-06-29
Applicant: QUALCOMM INC
Inventor： BUTTERFIELD DANIEL KEYES , GILMORE ROBERT P
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公开(公告)号：AU713733B2
公开(公告)日：1999-12-09
申请号：AU2604497
申请日：1997-04-01
Applicant: QUALCOMM INC
Inventor： GILMORE ROBERT P , THOMPSON JAMES H
Abstract: A system and method for controlling the strength of a shared resource signal transmitted by the satellite transponder in a satellite communications system. The satellite communications system includes a gateway for transmitting communications signals including a shared resource signal, a satellite transponder for relaying the signals to at least one subscriber unit (for example, a phone), and at least one subscriber unit for receiving the signals. The method includes the steps of receiving the shared resource signal, at each subscriber unit, via the satellite transponder; measuring, at each subscriber unit, a signal strength for the received shared resource signal; sending the signal strengths to the gateway; and adjusting the power of the shared resource signal transmitted by the satellite transponder based on the signal strengths.
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公开(公告)号：HK1007916A1
公开(公告)日：1999-04-30
申请号：HK98109021
申请日：1998-07-07
Applicant: QUALCOMM INC
Inventor： GILMORE ROBERT P
Abstract: A frequency synthesizer which uses a direct digital synthesizer (DDS) to generate a highly accurate periodic signal of a frequency selected from a plurality of reference frequencies. The DDS output signal is bandpass filtered utilizing a clean-up phase lock loop (PLL) to produce a spectrally pure reference signal and promote overall fast settling time. A second or primary phase lock loop, having a much faster settling time than the first PLL, adjusts the frequency of the reference signal generated by the clean-up PLL. In one embodiment, the DDS frequency synthesizer has a digital to analog (DAC) converter coupled to the clean-up PLL. Another embodiment uses a modified DDS (without a DAC or lookup table) and feeds the most significant bit (MSB) or overflow bit from the DAC accumulator into the "clean-up" PLL. In both embodiments, the resulting synthesizer has high spectral purity, fine frequency resolution and a fast settling time. Yet another embodiment uses a switching apparatus to bypass the "clean-up" PLL while it is settling on a new frequency. Once the "clean-up" PLL settles on the new frequency the switches are set to couple the "clean-up" PLL back into the synthesizer apparatus.
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