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    METHODS AND APPARATUS FOR SUPPORTING PEER TO PEER COMMUNICATIONS
    1.
    发明专利
    METHODS AND APPARATUS FOR SUPPORTING PEER TO PEER COMMUNICATIONS 未知

    公开(公告)号：IN2177CHN2014A

    公开(公告)日：2015-05-29

    申请号：IN2177CHN2014

    申请日：2014-03-21

    Applicant: QUALCOMM INC

    Inventor： RICHARDSON THOMAS J ,  LONCKE VINCENT ,  KNAPP EDWARD ,  UPPALA SATHYADEV ,  MURTI KRISHNA G

    IPC: H04W76/02

    Abstract: Methods and apparatus for supporting peer to peer and infrastructure e.g. cellular communication in a multimode device which can operate in a cellular system are described. Methods and apparatus for supporting peer to peer devices are also described. Peer to peer communication occurs within a switching time period during which infrastructure signaling does not occur and devices switch between an uplink and a downlink mode of infrastructure operation. The time period set for the switching time period is intentionally set larger e.g. 10 50 100 or even more times larger than that required based on maximum cell size. Thus a peer to peer communications period can be introduced into a TDD system and use the same frequency band as the TDD system in a manner that can remain compliant with a cellular communications protocol which allows for a switching time period e.g. set in the system by a parameter.

    Multiple low density parity check (LDPC) base graph design
    2.
    发明专利
    Multiple low density parity check (LDPC) base graph design 未知

    公开(公告)号：AU2018214491B2

    公开(公告)日：2022-06-09

    申请号：AU2018214491

    申请日：2018-01-19

    Applicant: QUALCOMM INC

    Inventor： SORIAGA JOSEPH BINAMIRA ,  SARKIS GABI ,  KUDEKAR SHRINIVAS ,  RICHARDSON THOMAS ,  LONCKE VINCENT

    IPC: H03M13/03 ,  H03M13/00 ,  H03M13/11

    Abstract: Aspects of the present disclosure relate to low density parity check (LDPC) coding utilizing LDPC base graphs. Two or more LDPC base graphs may be maintained that are associated with different ranges of overlapping information block lengths. A particular LDPC base graph may be selected for an information block based on the information block length of the information block. Additional metrics that may be considered when selecting the LDPC base graph may include the code rate utilized to encode the information block and/or the lift size applied to each LDPC base graph to produce the information block length of the information block.

    MULTIPLE LOW DENSITY PARITY CHECK (LDPC) BASE GRAPH DESIGN
    3.
    发明专利
    MULTIPLE LOW DENSITY PARITY CHECK (LDPC) BASE GRAPH DESIGN 未知

    公开(公告)号：PH12019501554A1

    公开(公告)日：2020-09-14

    申请号：PH12019501554

    申请日：2019-07-02

    Applicant: QUALCOMM INC

    Inventor： SORIAGA JOSEPH BINAMIRA ,  SARKIS GABI ,  KUDEKAR SHRINIVAS ,  RICHARDSON THOMAS ,  LONCKE VINCENT

    IPC: H03M13/00 ,  H03M13/03 ,  H03M13/11

    Abstract: Aspects of the present disclosure relate to low density parity check (LDPC) coding utilizing LDPC base graphs. Two or more LDPC base graphs may be maintained that are associated with different ranges of overlapping information block lengths. A particular LDPC base graph may be selected for an information block based on the information block length of the information block. Additional metrics that may be considered when selecting the LDPC base graph may include the code rate utilized to encode the information block and/or the lift size applied to each LDPC base graph to produce the information block length of the information block.

    RESOURCE-BASED AND CODE RATE BASED CODE BLOCK SEGMENTATION
    4.
    发明专利
    RESOURCE-BASED AND CODE RATE BASED CODE BLOCK SEGMENTATION 未知

    公开(公告)号：CA3046360A1

    公开(公告)日：2018-07-26

    申请号：CA3046360

    申请日：2018-01-18

    Applicant: QUALCOMM INC

    Inventor： WANG RENQIU ,  JIANG JING ,  SORIAGA JOSEPH BINAMIRA ,  RICHARDSON THOMAS JOSEPH ,  LONCKE VINCENT

    IPC: H04L1/00 ,  H03M13/05

    Abstract: Certain aspects of the present disclosure relate to methods and apparatus for optimizing delivery of a transport block (TB) using code rate and over the air resources dependent segmentation into code blocks for New Radio (NR). In order to improve reliability, either repetition or reduction of the code rate can be performed. Reduction of the code rate displays a gain with respect to repetition but increases the decoding complexity and therefore the transmission latency. Therefore, for low rate, it is suggested to limit the maximum code block size, and correspondingly the maximum amount of information to encode, in order to avoid that the decoder processes long code blocks. Based on the classical 3GPP LTE segmentation method, a method is built which performs segmentation of transport blocks into code blocks based on the number of resources available for transmission (also called over the air, OVA resources, based on which the transport block size is computed) and the code rate selected for transmission.

    MULTIPLE LOW DENSITY PARITY CHECK (LDPC) BASE GRAPH DESIGN
    5.
    发明专利
    MULTIPLE LOW DENSITY PARITY CHECK (LDPC) BASE GRAPH DESIGN 未知

    公开(公告)号：SG11201905827RA

    公开(公告)日：2019-08-27

    申请号：SG11201905827R

    申请日：2018-01-19

    Applicant: QUALCOMM INC

    Inventor： SORIAGA JOSEPH BINAMIRA ,  SARKIS GABI ,  KUDEKAR SHRINIVAS ,  RICHARDSON THOMAS ,  LONCKE VINCENT

    IPC: H03M13/03 ,  H03M13/00 ,  H03M13/11

    Abstract: MaintainLDPC base graphs, each associated thk ... a different Information block length rang foon c R a e t i e o i n ve l i o o o n c f l i r tn 'a be o e n n e b oloc d ek dtsIg a length n of an rate 904 n Select LDPC base graph hat supports information -v-s 908 block length Select LDPC base graph that suppo is code rate 912 Select LDPC base graph with the highest lift size 914 Encode information block using selected LDPC H 910 base graph to produce codeword Transmit codeword to receiver over wireless air H i , interface ( End FIG. 9 W O 20 18/ 14425 1 Al (12) INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property Organization International Bureau (43) International Publication Date 09 August 2018 (09.08.2018) WIP0 I PCT onion °nolo mm0E111°1 Em oimIE (10) International Publication Number WO 2018/144251 Al (51) International Patent Classification: H03M 13/03 (2006.01) H03M 13/00 (2006.01) H03M 13/11 (2006.01) (21) International Application Number: PCT/US2018/014528 (22) International Filing Date: 19 January 2018 (19.01.2018) (25) Filing Language: English (26) Publication Language: English (30) Priority Data: 62/455,450 06 February 2017 (06.02.2017) US 15/709,400 19 September 2017 (19.09.2017) US (71) Applicant: QUALCOMM INCORPORATED [US/US]; ATTN: International IP Administration, 5775 Morehouse Drive, San Diego, California 92121-1714 (US). (72) Inventors: SORIAGA, Joseph Binamira; 5775 More- house Drive, San Diego, California 92121-1714 (US). SARKIS, Gabi; 5775 Morehouse Drive, San Diego, Cal- ifornia 92121-1714 (US). KUDEKAR, Shrinivas; 304 Bencer Court, Raritan, NJ 08869 (US). RICHARDSON, Thomas; 5775 Morehouse Drive, San Diego, California 92121-1714 (US). LONCKE, Vincent; 5775 Morehouse Drive, San Diego, California 92121-1714 (US). (74) Agent: BURGESS, Jeffrey; Loza & Loza, LLP, 305 North Second Avenue #127, Upland, California 91786 (US). (81) Designated States (unless otherwise indicated, for every kind of national protection available): AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW. (84) Designated States (unless otherwise indicated, for every kind of regional protection available): ARIPO (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW), Eurasian (AM, AZ, BY, KG, KZ, RU, TJ, TM), European (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR), OAPI (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG). (54) Title: MULTIPLE LOW DENSITY PARITY CHECK (LDPC) BASE GRAPH DESIGN (57) : Aspects of the present disclosure relate to low density parity check (LDPC) coding utilizing LDPC base graphs. Two or more LDPC base 900 graphs may be maintained that are associated with different ranges of overlap- ping information block lengths. A particular LDPC base graph may be selected for an information block based on the information block length of the informa- tion block. Additional metrics that may be considered when selecting the LDPC base graph may include the code rate utilized to encode the information block and/or the lift size applied to each LDPC base graph to produce the information block length of the information block. [Continued on next page] WO 2018/144251 Al MIDEDIM01101 OlD IIMEN0MMHOM111111011111111111111111111111 Declarations under Rule 4.17: as to applicant's entitlement to apply for and be granted a patent (Rule 4.17(11)) as to the applicant's entitlement to claim the priority of the earlier application (Rule 4.17(iii)) Published: — with international search report (Art. 21(3))

    PIPELINED HIGH-THROUGHPUT LAYERED LDPC DECODER ARCHITECTURE
    6.
    发明专利
    PIPELINED HIGH-THROUGHPUT LAYERED LDPC DECODER ARCHITECTURE 未知

    公开(公告)号：SG11201902036YA

    公开(公告)日：2019-05-30

    申请号：SG11201902036Y

    申请日：2017-09-23

    Applicant: QUALCOMM INC

    Inventor： LONCKE VINCENT ,  VARATKAR GIRISH ,  RICHARDSON THOMAS JOSEPH ,  CAO YI

    IPC: H03M13/11

    Abstract: INTERNATIONAL APPLICATION PUBLISHED UNDER THE PATENT COOPERATION TREATY (PCT) (19) World Intellectual Property :::` , 1#111011110111010101111101 110 1 00111111E MIMI! I 1111011110111111 Organization International Bureau (10) International Publication Number 03 (43) International Publication Date .....•\"\"- WO 2018/084956 Al 11 May 2018 (11.05.2018) WIPO I PCT (51) International Patent Classification: (72) Inventors: LONCKE, Vincent; 5775 Morehouse Drive, H03M 13/11 (2006.01) San Diego, California 92121-1714 (US). VARATKAR, (21) International Application Number: Girish; 5775 Morehouse Drive, San Diego, California PCT/US2017/053128 92121-1714 (US). RICHARDSON, Thomas Joseph; 5775 Morehouse Drive, San Diego, California 92121-1714 (US). (22) International Filing Date: CAO, Yi; 5775 Morehouse Drive, San Diego, California 23 September 2017 (23.09.2017) 92121-1714 (US). (25) Filing Language: English (74) Agent: READ, Randol W. et al.; Patterson & Sheridan, (26) Publication Language: English L.L.P., 24 Greenway Plaza, Suite 1600, Houston, Texas 77046 (US). (30) Priority Data: (81) Designated States (unless otherwise indicated, for every 62/416,584 02 November 2016 (02.11.2016) US kind of national protection available): AE, AG, AL, AM, 15/712,845 22 September 2017 (22.09.2017) US AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, (71) Applicant: QUALCOMM INCORPORATED [US/US]; CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, ATTN: International IP Administration, 5775 Morehouse DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, Drive, San Diego, California 92121-1714 (US). HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, — (54) Title: PIPELINED HIGH-THROUGHPUT = (prior's) Bit LLR's LAYERED LDPC DECODER ARCHITECTURE Update bit LLR's — \ ‘;' • '','. • \ \:\ ;\. ••• \ Pass updated LLR's to a — Update posteriori compute stage = after 3 cycle pipeline delay = 1 bit LLR's with Ro f Update bit LLR's with R2/ = Compute a posteriori LLR's — Rn 1 1

    MULTIPLE LOW DENSITY PARITY CHECK (LDPC) BASE GRAPH DESIGN
    7.
    发明专利
    MULTIPLE LOW DENSITY PARITY CHECK (LDPC) BASE GRAPH DESIGN 未知

    公开(公告)号：CA3049454A1

    公开(公告)日：2018-08-09

    申请号：CA3049454

    申请日：2018-01-19

    Applicant: QUALCOMM INC

    Inventor： SORIAGA JOSEPH BINAMIRA ,  SARKIS GABI ,  KUDEKAR SHRINIVAS ,  RICHARDSON THOMAS ,  LONCKE VINCENT

    IPC: H03M13/03 ,  H03M13/00 ,  H03M13/11

    Abstract: Aspects of the present disclosure relate to low density parity check (LDPC) coding utilizing LDPC base graphs. Two or more LDPC base graphs may be maintained that are associated with different ranges of overlapping information block lengths. A particular LDPC base graph may be selected for an information block based on the information block length of the information block. Additional metrics that may be considered when selecting the LDPC base graph may include the code rate utilized to encode the information block and/or the lift size applied to each LDPC base graph to produce the information block length of the information block.

    DISEÑO DE GRAFICA BASE DE COMPROBACION DE PARIDAD DE BAJA DENSIDAD MULTIPLE (LDPC).
    9.
    发明专利
    DISEÑO DE GRAFICA BASE DE COMPROBACION DE PARIDAD DE BAJA DENSIDAD MULTIPLE (LDPC). 未知

    公开(公告)号：MX386736B

    公开(公告)日：2025-03-19

    申请号：MX2019008942

    申请日：2019-07-26

    Applicant: QUALCOMM INC

    Inventor： SARKIS GABI ,  SORIAGA JOSEPH BINAMIRA ,  KUDEKAR SHRINIVAS ,  RICHARDSON THOMAS ,  LONCKE VINCENT

    IPC: H03M13/03 ,  H03M13/00 ,  H03M13/11

    Abstract: Diversos aspectos de la presente divulgación se refieren codificación de comprobación de paridad de densidad (LDPC) que utiliza gráficos de base de LDPC. Dos o más gráficos de base de LDPC se puede mantener que están asociados con diferentes rangos de superposición de longitudes de bloque de información. Un gráfico de base de LDPC particular puede ser seleccionado para un bloque de información con base en la longitud de bloque de información del bloque de información. Las métricas adicionales que pueden ser consideradas al seleccionar el gráfico de base de LDPC pueden incluir la tasa de codificación utilizada para codificar el bloque de información y/o el tamaño de elevación aplicada a cada gráfico de base de LDPC para producir la longitud del bloque de información del bloque de información.

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