公开(公告)号：JP2009260978A

公开(公告)日：2009-11-05

申请号：JP2009134921

申请日：2009-06-04

Applicant: Qualcomm Inc ,  クゥアルコム・インコーポレイテッドQualcomm Incorporated

Inventor： CICCARELLI STEVEN C ,  YOUNIS SAED G

IPC: H04B1/26 ,  G01S19/07 ,  G01S19/11 ,  G01S19/12 ,  G01S19/31 ,  H04B1/38 ,  H04B1/40 ,  H04B1/62 ,  H04L27/22

CPC classification number: H04B1/0057 ,  H04B1/005 ,  H04B1/006 ,  H04B1/406

Abstract: PROBLEM TO BE SOLVED: To provide a receiver design in a multiple mode telephone, which uses common hardwares for downconversion and sampling operation, and so is usable to minimize hardware components necessary for the multiple mode telephone.
SOLUTION: A receiver 2 which downconverts an input signal modulated by using first, second, third and fourth modulation formats, into a common intermediate frequency range. The input signal is supplied to first, second and third band selection filters 10, 12, 14 which select first, second and third frequency ranges, respectively. A first downconverter 20 is connected to an output of the first band selection filter and downconverts a signal from the first frequency range into the common intermediate frequency range.
COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：在多模式电话中提供接收机设计，其使用普通硬件进行下变频和采样操作，因此可用于最小化多模电话所需的硬件组件。 解决方案：将通过使用第一，第二，第三和第四调制格式调制的输入信号下变频成公共中频范围的接收机2。 输入信号被提供给分别选择第一，第二和第三频率范围的第一，第二和第三频带选择滤波器10,12,14。 第一下变频器20连接到第一频带选择滤波器的输出，并将来自第一频率范围的信号下变频到公共中频范围。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2008219922A

公开(公告)日：2008-09-18

申请号：JP2008096328

申请日：2008-04-02

Applicant: Qualcomm Inc ,  クゥアルコム・インコーポレイテッドQualcomm Incorporated

Inventor： CICCARELLI STEVEN C ,  YOUNIS SAED G ,  KAUFMAN RALPH E

IPC: H04B1/16 ,  H03F1/02 ,  H03F1/34 ,  H03G1/00 ,  H03G3/18 ,  H03G3/20 ,  H04B1/10

CPC classification number: H03G3/3068 ,  H03F1/0261 ,  H03F1/342 ,  H03F2200/294 ,  H03F2200/331 ,  H03F2200/372 ,  H03G1/0088 ,  H04B1/1027 ,  H04B1/109

Abstract: PROBLEM TO BE SOLVED: To provide the requisite level of performance while minimizing power consumption.
SOLUTION: Power consumption is minimized on the basis of the measurement of non-linearity in an output signal from a receiver 1,200. The amount of the non-linearity can be measured by an RSSI slope or an energy-per-chip-to-noise-ratio Ec/Io value. The RSSI slope is the ratio of a change in the output signal plus intermodulation to a change in an input signal. The input signal level is periodically increased by a prescribed level and the output signal from the receiver 1,200 is measured. The output signal comprises a desired signal and intermodulation products from the non-linearity within the receiver 1200. When the receiver 1,200 is operating linearly, the output signal level increases dB per dB with the input signal level. However, when the receiver 1,200 enters into a non-linear region, intermodulation products caused by a non-linearity increase faster than the desired signal. By detecting the RSSI slope, the amount of degradation caused by the non-linearity can be determined. This information is then used to adjust the IIP3 operating point of an amplifier 1,234 and a mixer.
COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供必要的性能水平，同时最大限度地降低功耗。 解决方案：基于来自接收机1200的输出信号中的非线性的测量，使功耗最小化。 非线性的量可以通过RSSI斜率或每芯片上的能量/比率Ec / Io值来测量。 RSSI斜率是输出信号加互调变化与输入信号变化的比率。 输入信号电平周期性地增加规定电平，测量来自接收机1,200的输出信号。 输出信号包括期望的信号和来自接收器1200内的非线性的互调产物。当接收器1,200线性运行时，输出信号电平随着输入信号电平而增加每dB dB。 然而，当接收机1,200进入非线性区域时，由非线性引起的互调产物比期望的信号增加更快。 通过检测RSSI斜率，可以确定由非线性引起的劣化量。 然后，该信息用于调整放大器1,234和混频器的IIP3工作点。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：CA2406716C

公开(公告)日：2011-01-04

申请号：CA2406716

申请日：2001-05-08

Applicant: QUALCOMM INC

Inventor： PATRICK CHRISTOPHER ,  YOUNIS SAED G

IPC: H04B1/26 ,  G01S1/00 ,  G01S5/14 ,  G01S7/40 ,  G01S19/03 ,  G01S19/23 ,  H03B1/04 ,  H03J7/04 ,  H03L1/00 ,  H03L1/02 ,  H03L7/06 ,  H03L7/18 ,  H04B1/707 ,  H04L27/00

Abstract: The frequency error of an oscillator is minimized by characterizing the oscillator. A reference signal from an external source containing a minimal frequency error is provided to an electronic device. The external signal is used as a reference frequency to estimate the frequency error of an internal frequency source. The electronic device monitors parameters that are determined to have an effect on the frequency accuracy of the internal frequency source. Temperature is one parameter known to have an effect on the frequency of the internal frequency source. The electronic device collects and stores the values of the parameters as well as the corresponding output frequency or frequency error of the internal frequency source. The resultant characterization of the internal frequency source is used to compensate the internal frequency source when the internal frequency source is not provided the external reference signal.

公开(公告)号：AU2008200624B2

公开(公告)日：2010-09-16

申请号：AU2008200624

申请日：2008-02-08

Applicant: QUALCOMM INC

Inventor： FILIPOVIC DANIEL ,  KAUFMAN RALPH ,  YOUNIS SAED G ,  WILBORN THOMAS ,  LIN JIAN ,  ZHANG HAITAO ,  SIMIC EMILIJA

IPC: H03G3/30 ,  H04B1/04 ,  H03G3/20 ,  H04B7/005 ,  H04B7/24

Abstract: Transmitter architectures for a communications system having improved performance over conventional transmitter architectures. The improvements include a combination of the following: faster response time for the control signals, improved linearity, reduced interference, reduced power consumption, lower circuit complexity, and lower costs. For a cellular application, these improvements can lead to increased system capacity, smaller telephone size, increased talk and standby times, and greater acceptance of the product. Circuitry is provided to speed up the response time of a control signal. The control loop for various elements in the transmit signal path are integrated. A gain control mechanism allows for accurate adjustment of the output transmit power level. Control mechanisms are provided to power down the power amplifier, or th e entire transmit signal path, when not needed. The gains of the various elements in the transmit signal path are controlled to reduce transients in the output transmit power, and to also ensure that transients are downward.

公开(公告)号：CA2313471C

公开(公告)日：2008-10-14

申请号：CA2313471

申请日：1998-12-08

Applicant: QUALCOMM INC

Inventor： KAUFMAN RALPH E ,  YOUNIS SAED G ,  CICCARELLI STEVEN C

IPC: H04B1/10 ,  H03F1/02 ,  H03F1/34 ,  H03G1/00 ,  H03G3/18 ,  H03G3/20 ,  H04B1/16

Abstract: A programmable linear receiver (1200) which provides the requisite level of system performance at reduced power consumption. The receiver minimizes power consumption based on measurement of the non- linearity in the ouput signal from the receiver (1200). The amount of non-linearity can be measured by the RSSI slope or energy-per-chip- to-noise-ratio (Ec/Io) measurement. The RSSI slope is the ratio of the change in the output signal plus intermodulation to the change in the input signal. The input signal level is periodically increased by a predetermined level and the output signal from the receiver (1200) is measured. The ouput signal comprises the desired signal and intermodulation products from non-linearity within the receiver (1200). When the receiver (1200) is operating linearly, the output signal level increases dB per dB with the input signal level. However, as the receiver (1200) transitions into non-linear region, intermodulation products due to non-linearity increase faster than the desired signal. By detecting the RSSI slope, the amount of degradation due to non-linearity can be determined. This information is then used to adjust the IIP3 operating point of the amplifiers (1234) and mixer (1230) to provide the requisite level of performance while minimizing power consumption.

公开(公告)号：CA2312958C

公开(公告)日：2008-10-07

申请号：CA2312958

申请日：1998-12-08

Applicant: QUALCOMM INC

Inventor： BAZARJANI SEYFOLLAH S ,  CICCARELLI STEVEN C ,  YOUNIS SAED G

IPC: H03M1/18 ,  H04B1/10 ,  H03M3/02 ,  H04B1/16

Abstract: A programmable dynamic range receiver which provides the requisite level of performance at reduced power consumption. The .SIGMA..DELTA. ADC within the receiver is designed with one or more loops. Each loop provides a predetermined dynamic range performance. The loops can be enabled or disabled based on the required dynamic range and a set of dynamic range thresholds. The .SIGMA..DELTA. ADC is also designed with adjustable bias current. The dynamic range of the .SIGMA..DELTA. ADC varies approximately proportional to the bias current. By adjusting the bias current, the required dynamic range can be provided by the .SIGMA..DELTA. ADC with minimal power consumption. A reference voltage of the .SIGMA..DELTA. ADC can be decreased when high dynamic range is not required, thereby allowing for less bias current in the .SIGMA..DELTA. ADC and supporting circuitry. The dynamic range of the .SIGMA..DELTA. ADC is a also function of the oversampling ratio which is proportional to the sampling frequency. High dynamic range requires a high oversampling ratio. When high dynamic range is not required, the sampling frequency can be lowered.

公开(公告)号：DK1040587T3

公开(公告)日：2008-06-02

申请号：DK98962004

申请日：1998-12-08

Applicant: QUALCOMM INC

Inventor： YOUNIS SAED G ,  BUTTERFIELD DANIEL K ,  BAZARJANI SEYFOLLAH S ,  CICCARELLI STEVEN C

IPC: H03M1/66 ,  H04B1/16 ,  H03D3/00 ,  H03D7/16 ,  H03M3/02 ,  H04B1/26

Abstract: A receiver comprising a sigma-delta analog-to-digital converter ( SIGMA DELTA ADC) can be utilized in one of four configurations, as a subsampling bandpass receiver, a subsampling baseband receiver, a Nyquist sampling bandpass receiver, or a Nyquist sampling baseband receiver. For subsampling SIGMA DELTA receivers, the sampling frequency is less than twice the center frequency of the input signal into the SIGMA DELTA ADC. For Nyquist sampling SIGMA DELTA receivers, the sampling frequency is at least twice the highest frequency of the input signal into the SIGMA DELTA ADC. For baseband SIGMA DELTA receivers, the center frequency of the output signal from the SIGMA DELTA ADC is approximately zero or DC. For bandpass SIGMA DELTA receivers, the center frequency of the output signal from the SIGMA DELTA ADC is greater than zero. The sampling frequency can be selected based on the bandwidth of the input signal to simplify the design of the digital circuits used to process the output samples from the SIGMA DELTA ADC. Furthermore, the center frequency of the input signal can be selected based on the sampling frequency and the bandwidth of the input signal. The SIGMA DELTA ADC within the receiver provides many benefits.

公开(公告)号：DE69837722T2

公开(公告)日：2008-01-10

申请号：DE69837722

申请日：1998-12-08

Applicant: QUALCOMM INC

Inventor： YOUNIS SAED G ,  BAZARJANI SEYFOLLAH S ,  CICCARELLI STEVEN C

IPC: H03M1/18 ,  H04B1/10 ,  H03M3/02 ,  H04B1/16

Abstract: A programmable dynamic range receiver which provides the requisite level of performance at reduced power consumption. The SIGMA DELTA ADC within the receiver is designed with one or more loops. Each loop provides a predetermined dynamic range performance. The loops can be enabled or disabled based on the required dynamic range and a set of dynamic range thresholds. The SIGMA DELTA ADC is also designed with adjustable bias current. The dynamic range of the SIGMA DELTA ADC varies approximately proportional to the bias current. By adjusting the bias current, the required dynamic range can be provided by the SIGMA DELTA ADC with minimal power consumption. A reference voltage of the SIGMA DELTA ADC can be descreased when high dynamic range is not required, thereby allowing for less bias current in the SIGMA DELTA ADC and supporting circuitry. The dynamic range of the SIGMA DELTA ADC is a also function of the oversampling ratio which is proportional to the sampling frequency. High dynamic range requires a high oversampling ratio. When high dynamic range is not required, the sampling frequency can be lowered.

公开(公告)号：BR0110684A

公开(公告)日：2004-06-22

申请号：BR0110684

申请日：2001-05-08

Applicant: QUALCOMM INC

Inventor： PATRICK CHRISTOPHER ,  YOUNIS SAED G

IPC: G01S1/00 ,  G01S7/40 ,  G01S19/03 ,  G01S19/23 ,  H03J7/04 ,  H03L1/00 ,  H03L1/02 ,  H03L7/06 ,  H03L7/18 ,  H04B1/707 ,  H04L27/00 ,  G01S1/02

Abstract: The frequency error of an oscillator is minimized by characterizing the oscillator. A reference signal from an external source containing a minimal frequency error is provided to an electronic device. The external signal is used as a reference frequency to estimate the frequency error of an internal frequency source. The electronic device monitors parameters that are determined to have an effect on the frequency accuracy of the internal frequency source. Temperature is one parameter known to have an effect on the frequency of the internal frequency source. The electronic device collects and stores the values of the parameters as well as the corresponding output frequency or frequency error of the internal frequency source. The resultant characterization of the internal frequency source is used to compensate the internal frequency source when the internal frequency source is not provided the external reference signal.

公开(公告)号：AU746148B2

公开(公告)日：2002-04-18

申请号：AU1717899

申请日：1998-12-08

Applicant: QUALCOMM INC

Inventor： BAZARJANI SEYFOLLAH S ,  CICCARELLI STEVEN C ,  YOUNIS SAED G ,  BUTTERFIELD DANIEL K

IPC: H03M1/66 ,  H03D3/00 ,  H03D7/16 ,  H03M3/02 ,  H04B1/26 ,  H04B1/16

Abstract: A receiver comprising a sigma-delta analog-to-digital converter ( SIGMA DELTA ADC) can be utilized in one of four configurations, as a subsampling bandpass receiver, a subsampling baseband receiver, a Nyquist sampling bandpass receiver, or a Nyquist sampling baseband receiver. For subsampling SIGMA DELTA receivers, the sampling frequency is less than twice the center frequency of the input signal into the SIGMA DELTA ADC. For Nyquist sampling SIGMA DELTA receivers, the sampling frequency is at least twice the highest frequency of the input signal into the SIGMA DELTA ADC. For baseband SIGMA DELTA receivers, the center frequency of the output signal from the SIGMA DELTA ADC is approximately zero or DC. For bandpass SIGMA DELTA receivers, the center frequency of the output signal from the SIGMA DELTA ADC is greater than zero. The sampling frequency can be selected based on the bandwidth of the input signal to simplify the design of the digital circuits used to process the output samples from the SIGMA DELTA ADC. Furthermore, the center frequency of the input signal can be selected based on the sampling frequency and the bandwidth of the input signal. The SIGMA DELTA ADC within the receiver provides many benefits.