公开(公告)号：WO2014031787A1

公开(公告)日：2014-02-27

申请号：PCT/US2013/056056

申请日：2013-08-21

Applicant: QUALCOMM INCORPORATED

Inventor： AHN, Minsik ,  AN, Kyu Hwan ,  LEE, Chang-Ho ,  HADJICHRISTOS, Aristotele

IPC: H03K17/56 ,  H03H7/48

CPC classification number: H03H7/0153 ,  H03F2200/378 ,  H03F2200/387 ,  H03H7/01 ,  H03H7/48 ,  H03K17/102 ,  H03K17/56

Abstract: A high power tunable capacitor (500) is disclosed. In an exemplary embodiment, an apparatus includes a capacitor (508) coupled to an input signal (504), a body contacted switch (510) coupled to the capacitor, the body contacted switch coupled to a body bias signal (Bb), and a floating body switch (512) coupled between the body contacted switch and a ground, the floating body switch configured to decouple the body bias signal from the ground.

Abstract translation: 公开了一种高功率可调电容器（500）。 在一个示例性实施例中，装置包括耦合到输入信号（504）的电容器（508），耦合到电容器的身体接触开关（510），耦合到体偏置信号（Bb）的身体接触开关，以及 浮体开关（512），其联接在身体接触开关和地面之间，浮体开关被配置为将身体偏置信号与地面分离。

公开(公告)号：WO2011011757A1

公开(公告)日：2011-01-27

申请号：PCT/US2010/043156

申请日：2010-07-23

Applicant: QUALCOMM Incorporated ,  PLETCHER, Nathan M. ,  HADJICHRISTOS, Aristotele ,  ZHAO, Yu ,  NEJATI, Babak

Inventor： PLETCHER, Nathan M. ,  HADJICHRISTOS, Aristotele ,  ZHAO, Yu ,  NEJATI, Babak

IPC: H04B1/04 ,  H03F1/56

CPC classification number: H04B1/0458 ,  H03F1/56 ,  H03F3/245 ,  H04B1/406

Abstract: Exemplary embodiments are directed to a transmitter with a power amplifier and a switched output matching circuit implementing a plurality of output paths for a plurality of operating modes is described. The power amplifier receives an input RF signal and provides an amplified RF signal. An output matching network performs impedance transformation from low impedance at the power amplifier output to higher impedance at the matching network output. The plurality of output paths are coupled to the output matching network. Each output path provides a different target output impedance for the power amplifier and routes the amplified RF signal from the power amplifier to an antenna when that output path is selected. Each output path may include a matching network coupled in series with a switch. The matching network provides the target output impedance for the power amplifier when the output path is selected. The switch couples or decouples the output path to/from the power amplifier.

Abstract translation: 示例性实施例涉及具有功率放大器和实现用于多个操作模式的多个输出路径的切换输出匹配电路的发射机。 功率放大器接收输入RF信号并提供放大的RF信号。 输出匹配网络执行从功率放大器输出端的低阻抗到匹配网络输出端的较高阻抗的阻抗变换。 多个输出路径耦合到输出匹配网络。 当选择该输出路径时，每个输出路径为功率放大器提供不同的目标输出阻抗，并将放大的RF信号从功率放大器路由到天线。 每个输出路径可以包括与开关串联耦合的匹配网络。 当选择输出路径时，匹配网络为功率放大器提供目标输出阻抗。 开关将输出路径耦合到/从功率放大器解耦。

公开(公告)号：WO2010148407A2

公开(公告)日：2010-12-23

申请号：PCT/US2010/039376

申请日：2010-06-21

Applicant: QUALCOMM INCORPORATED ,  SEE, Puay Hoe ,  BALLANTYNE, Gary John ,  SAHOTA, Gurkanwal Singh ,  HADJICHRISTOS, Aristotele ,  CICALINI, Alberto

Inventor： SEE, Puay Hoe ,  BALLANTYNE, Gary John ,  SAHOTA, Gurkanwal Singh ,  HADJICHRISTOS, Aristotele ,  CICALINI, Alberto

IPC: H04B1/04

CPC classification number: H04B1/0458 ,  H03H7/40

Abstract: Exemplary embodiments disclosed are directed to power and impedance measurement circuits that may be used to measure power and/or impedance are described. A measurement circuit may include a sensor and a computation unit. The sensor may sense (i) a first voltage signal across a series circuit coupled to a load to obtain a first sensed signal and (ii) a second voltage signal at a designated end of the series circuit to obtain a second sensed signal. The sensor may mix (i) a first version of the first sensed signal with a first version of the second sensed signal to obtain a first sensor output and (ii) a second version of the first sensed signal with a second version of the second sensed signal to obtain a second sensor output. The computation unit may determine the impedance and/or delivered power at the designated end of the series circuit based on the sensor outputs.

Abstract translation: 所公开的示例性实施例涉及可用于测量功率和/或阻抗的功率和阻抗测量电路。 测量电路可以包括传感器和计算单元。 传感器可以感测（i）跨耦合到负载的串联电路的第一电压信号以获得第一感测信号，以及（ii）串联电路的指定端的第二电压信号以获得第二感测信号。 传感器可以将（i）第一感测信号的第一版本与第二感测信号的第一版本混合以获得第一传感器输出，以及（ii）第一感测信号的第二版本，具有第二感测的第二版本 信号以获得第二传感器输出。 计算单元可以基于传感器输出来确定串联电路的指定端处的阻抗和/或传递功率。

公开(公告)号：WO2019203967A1

公开(公告)日：2019-10-24

申请号：PCT/US2019/022402

申请日：2019-03-15

Applicant: QUALCOMM INCORPORATED

Inventor： LIANG, Qingqing ,  CAROBOLANTE, Francesco ,  MARINO, Fabio, Alessio ,  KANIKE, Narasimhulu ,  MENEGOLI, Paolo ,  HADJICHRISTOS, Aristotele

IPC: H01L29/93 ,  H01L29/94 ,  H01L29/40 ,  H01L29/06 ,  H01L29/78

Abstract: Certain aspects of the present disclosure provide a semiconductor device. One example semiconductor device generally includes a first semiconductor region; a first non-insulative region disposed adjacent to a first lateral side of the first semiconductor region; a second non-insulative region disposed adjacent to a second lateral side of the first semiconductor region, the second lateral side being opposite to the first lateral side; a second semiconductor region disposed adjacent to a third lateral side of the first semiconductor region, the second semiconductor region and the first semiconductor region having at least one of different doping types or different doping concentrations; an insulative layer adjacent to a top side of the first semiconductor region; and a third non-insulative region, the insulative layer being disposed between the third non-insulative region and the first semiconductor region.

公开(公告)号：WO2015094931A1

公开(公告)日：2015-06-25

申请号：PCT/US2014/069877

申请日：2014-12-12

Applicant: QUALCOMM INCORPORATED

Inventor： HADJICHRISTOS, Aristotele ,  PRESTI, Calogero Davide ,  NEJATI, Babak

IPC: H03F1/56 ,  H03F3/195 ,  H03F3/24

CPC classification number: H03F1/565 ,  H03F3/19 ,  H03F3/191 ,  H03F3/195 ,  H03F3/245 ,  H03F2200/111 ,  H03F2200/378 ,  H03F2200/387 ,  H03F2200/391 ,  H03F2200/417 ,  H03F2200/423

Abstract: A tunable loadline is disclosed. In an exemplary embodiment, an apparatus includes an amplifier configured to output an amplified signal having a selected power level and a first impedance network coupled to receive the amplified signal at an input terminal and generate a first output signal having a first power level at a first output terminal. The first impedance network being configured to load the amplified signal to convert the selected power level to the first power level. The apparatus also includes a second impedance network configured to selectively receive the first output signal and generate a second output signal having a second power level at a second output terminal. The second impedance network being configured to combine with the first impedance network to load the amplified signal to convert the selected power level to the second power level.

Abstract translation: 公开了一种可调节负载线。 在示例性实施例中，一种装置包括：放大器，被配置为输出具有选定功率电平的放大信号和耦合以在输入端接收放大信号的第一阻抗网络，并产生第一功率电平的第一输出信号 输出端子。 第一阻抗网络被配置为加载放大的信号以将所选择的功率电平转换为第一功率电平。 该装置还包括配置成选择性地接收第一输出信号并且在第二输出端产生具有第二功率电平的第二输出信号的第二阻抗网络。 第二阻抗网络被配置为与第一阻抗网络组合以加载放大的信号，以将所选择的功率电平转换为第二功率电平。

公开(公告)号：WO2014133883A1

公开(公告)日：2014-09-04

申请号：PCT/US2014/017580

申请日：2014-02-21

Applicant: QUALCOMM INCORPORATED

Inventor： SONG, Young, K. ,  PARK, Yunseo ,  ZHANG, Xiaonan ,  LANE, Ryan, D. ,  NEJATI, Babak ,  HADJICHRISTOS, Aristotele ,  CHEN, Xiaoming

IPC: H01L23/64 ,  H01L23/522 ,  H01L25/07 ,  H01L25/11 ,  H01L25/065

CPC classification number: H01L23/5227 ,  H01L23/645 ,  H01L24/02 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/074 ,  H01L25/117 ,  H01L2224/02375 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/05569 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2225/06513 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15331 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/00012

Abstract: Some novel features pertain to a first example provides a semiconductor device that includes a printed circuit board (PCB), asset of solder balls and a die. The PCB includes a first metal layer. The set of solder balls is coupled to the PCB. The die is coupled to the PCB through the set of solder balls. The die includes a second metal layer and a third metal layer. The first metal layer of the PCB, the set of solder balls, the second and third metal layers of the die are configured to operate as an inductor in the semiconductor device. In some implementations, the die further includes a passivation layer. The passivation layer is positioned between the second metal layer and the third metal layer. In some implementations, the second metal layer is positioned between the passivation layer and the set of solder balls.

Abstract translation: 一些新颖特征涉及第一示例，提供了包括印刷电路板（PCB），焊球和裸片的资产的半导体器件。 PCB包括第一金属层。 该组焊球与PCB相连。 模具通过一组焊球耦合到PCB。 模具包括第二金属层和第三金属层。 PCB的第一金属层，焊球集合，管芯的第二和第三金属层被配置为在半导体器件中作为电感器工作。 在一些实施方式中，芯片还包括钝化层。 钝化层位于第二金属层和第三金属层之间。 在一些实施方案中，第二金属层位于钝化层和一组焊球之间。

公开(公告)号：WO2014078742A2

公开(公告)日：2014-05-22

申请号：PCT/US2013/070434

申请日：2013-11-15

Applicant: QUALCOMM INCORPORATED

Inventor： CHA, Jeongwon ,  LEE, Chang-Ho ,  HADJICHRISTOS, Aristotele

IPC: H03F1/02

CPC classification number: H03F1/0277 ,  H03F1/223 ,  H03F1/523 ,  H03F3/211 ,  H03F3/245 ,  H03F2200/61 ,  H03K17/102

Abstract: Techniques for providing adjustable gain in an amplifier. In an aspect, a composite amplifier having adjustable gain includes a plurality of amplifiers coupled in parallel, wherein each of the amplifiers may be turned on or off to adjust the overall gain of the composite amplifier. Each amplifier may include an input transistor and at least two cascode transistors. To turn each amplifier off, the gate voltage of a second or lowermost cascode transistor coupled to the input transistor may be grounded, and the gate voltage of a first cascode transistor coupled to the output voltage may be coupled to a first turn-off voltage to reduce the drain-to-gate voltage drop across the first cascode transistor. Further aspects provide for decoupling a capacitor coupled to the gates of the cascode transistors from AC ground when the amplifier is turned off.

Abstract translation:

在放大器中提供可调增益的技术。 一方面，具有可调节增益的复合放大器包括并联耦合的多个放大器，其中每个放大器可以被开启或关闭以调节复合放大器的整体增益。 每个放大器可以包括输入晶体管和至少两个共源共栅晶体管。 为了关闭每个放大器，耦合到输入晶体管的第二或最低级联晶体管的栅极电压可以接地，并且耦合到输出电压的第一级联晶体管的栅极电压可以耦合到第一关断电压以 降低第一共源共栅晶体管两端的漏极至栅极压降。 进一步的方面提供了当放大器关闭时将耦合到共源共栅晶体管的栅极的电容器与交流地断开。

公开(公告)号：WO2011022549A2

公开(公告)日：2011-02-24

申请号：PCT/US2010/046021

申请日：2010-08-19

Applicant: QUALCOMM INCORPORATED ,  ZHAO, Yu ,  NEJATI, Babak ,  PLETCHER, Nathan M. ,  HADJICHRISTOS, Aristotele

Inventor： ZHAO, Yu ,  NEJATI, Babak ,  PLETCHER, Nathan M. ,  HADJICHRISTOS, Aristotele

IPC: H03H7/38

CPC classification number: H03F1/42 ,  H03F1/223 ,  H03F3/193 ,  H03F2200/318 ,  H03H7/40

Abstract: A tunable inter-stage matching circuit that can improve performance is described. In an exemplary design, an apparatus includes a first active circuit (e.g., a driver amplifier), a second active circuit (e.g., a power amplifier), and a tunable inter-stage matching circuit coupled between the first and second active circuits. The tunable inter-stage matching circuit includes a tunable capacitor that can be varied in discrete steps to adjust impedance matching between the first and second active circuits. In an exemplary design, the tunable capacitor includes (i) a plurality of capacitors coupled in parallel and (ii) a plurality of switches coupled to the plurality of capacitors, one switch for each capacitor. Each switch may be turned on to select an associated capacitor or turned off to unselect the associated capacitor. The tunable capacitor may further include a fixed capacitor coupled in parallel with the plurality of capacitors.

Abstract translation: 描述了可以提高性能的可调节级间匹配电路。 在示例性设计中，装置包括耦合在第一和第二有源电路之间的第一有源电路（例如，驱动器放大器），第二有源电路（例如功率放大器）以及可调谐的级间匹配电路。 可调级间匹配电路包括可调电容器，该可调电容器可以在离散步骤中变化以调整第一和第二有源电路之间的阻抗匹配。 在示例性设计中，可调电容器包括（i）并联耦合的多个电容器和（ii）耦合到多个电容器的多个开关，每个电容器一个开关。 每个开关可以打开以选择关联的电容器或关闭以取消选择关联的电容器。 可调电容器还可以包括与多个电容器并联耦合的固定电容器。

公开(公告)号：WO2010135711A1

公开(公告)日：2010-11-25

申请号：PCT/US2010/035863

申请日：2010-05-21

Applicant: QUALCOMM INCORPORATED ,  HADJICHRISTOS, Aristotele ,  SAHOTA, Gurkanwal, S.

Inventor： HADJICHRISTOS, Aristotele ,  SAHOTA, Gurkanwal, S.

IPC: H04B1/04 ,  H03F1/52

CPC classification number: H04B1/0466 ,  H03F1/523 ,  H03F3/24 ,  H03F2200/447 ,  H03F2200/468

Abstract: A device including a gain control element coupled prior to or within a radio frequency (RF) power amplifier (PA) with an adaptive parametric PA protection circuit is described. In an exemplary embodiment, the device includes a gain control element coupled prior to a radio frequency power amplifier with a power stage with corresponding transistor breakdown threshold values, having an adaptive parametric PA protection circuit configured to receive at least one power stage drain-source voltage parameter value, at least one power stage drain-gate voltage parameter value, and at least one power stage drain-source current parameter value, and including an adaptive parametric PA protection circuit having a first section for processing the parameter values and a second section for generating a gain correction signal to adjust the gain control element with optimal power added efficiency (PAE) for the power stage within the corresponding transistor breakdown threshold values.

Abstract translation: 描述了在具有自适应参数PA保护电路的射频（RF）功率放大器（PA）之前或之内耦合的增益控制元件的装置。 在示例性实施例中，该装置包括增益控制元件，该增益控制元件在具有相应的晶体管击穿阈值的功率级的射频功率放大器之前耦合，具有自适应参数PA保护电路，该自适应参数PA保护电路被配置为接收至少一个功率级漏 - 源电压 参数值，至少一个功率级漏极栅极电压参数值和至少一个功率级漏源电流参数值，并且包括具有用于处理参数值的第一部分的自适应参数PA保护电路和用于 产生增益校正信号，以在相应的晶体管击穿阈值内对功率级的最佳功率附加效率（PAE）调节增益控制元件。

公开(公告)号：WO2014043271A1

公开(公告)日：2014-03-20

申请号：PCT/US2013/059309

申请日：2013-09-11

Applicant: QUALCOMM INCORPORATED

Inventor： CABANILLAS, Jose ,  HADJICHRISTOS, Aristotele ,  KRISTENSEN, Per O. ,  PUNTAMBEKAR, Mohan V.

IPC: H03H7/46 ,  H03H11/34 ,  H04B1/00 ,  H04B1/18 ,  H04B1/707 ,  H04B1/48 ,  H01P1/213 ,  H03H7/38 ,  H03H11/30

CPC classification number: H03H11/344 ,  H01P1/213 ,  H03H7/465 ,  H03H11/30 ,  H03H2007/386 ,  H04B1/0458

Abstract: Techniques to implement a filter for a selected signal path by reusing a circuit component in an unselected signal path are disclosed. In an exemplary design, an apparatus includes first, second, and third circuits (580a, 580b, 560a). The first circuit (580a) passes a first radio frequency (RF) signal to an antenna (598) when a first signal path (522a) is selected. The second circuit (580b) passes a second RF signal to the antenna (598) when a second signal path (522b) is selected. The third circuit (560a) is selectively coupled to the first circuit (580a), e.g., via a switch (562a). The first and third circuits (580a, 560a) form a filter for the second RF signal (e.g., to attenuate a harmonic of the second RF signal) when the second signal path (522b) is selected and the first signal path (522a) is unselected. The first circuit may include a series inductor, and the third circuit may include a shunt capacitor.

Abstract translation: 公开了通过重新使用未选信号路径中的电路部件来实现所选信号路径的滤波器的技术。 在示例性设计中，装置包括第一，第二和第三电路（580a，580b，560a）。 当选择第一信号路径（522a）时，第一电路（580a）将第一射频（RF）信号传递到天线（598）。 当选择第二信号路径（522b）时，第二电路（580b）将第二RF信号传递到天线（598）。 第三电路（560a）例如经由开关（562a）选择性地耦合到第一电路（580a）。 当选择第二信号路径（522b）并且第一信号路径（522a）是第一信号路径（522a）时，第一和第三电路（580a，560a）形成用于第二RF信号的滤波器（例如，衰减第二RF信号的谐波） 未选中。 第一电路可以包括串联电感器，并且第三电路可以包括并联电容器。