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    BANDWIDTH/RESOURCE MANAGEMENT FOR MULTITHREADED PROCESSORS
    1.
    发明申请
    BANDWIDTH/RESOURCE MANAGEMENT FOR MULTITHREADED PROCESSORS 审中-公开
    多重处理器的宽带/资源管理

    公开(公告)号：WO2016195851A1

    公开(公告)日：2016-12-08

    申请号：PCT/US2016/029530

    申请日：2016-04-27

    Applicant: QUALCOMM INCORPORATED

    Inventor： GADELRAB, Serag Monier ,  KOOB, Christopher Edward ,  BOOTH, Simon ,  BALATSOS, Aris ,  KUAN, Johnny Jone Wai ,  RAMKUMAR, Myil ,  PABLA, Bhupinder Singh ,  SWEENEY, Sean David ,  PATSILARAS, George

    IPC: G06F9/48

    CPC classification number: G06F9/4818 ,  G06F9/46 ,  G06F9/4887 ,  G06F11/0724 ,  G06F11/079 ,  G06F2209/506

    Abstract: Systems and methods relate to managing shared resources in a multithreaded processor comprising two or more processing threads. Danger levels for the two or more threads are determined, wherein the danger level of a thread is based on a potential failure of the thread to meet a deadline due to unavailability of a shared resource. Priority levels associated with the two or more threads are also determined, wherein the priority level is higher for a thread whose failure to meet a deadline is unacceptable and the priority level is lower for a thread whose failure to meet a deadline is acceptable. The two or more threads are scheduled based at least on the determined danger levels for the two or more threads and priority levels associated with the two or more threads.

    Abstract translation: 系统和方法涉及在包括两个或多个处理线程的多线程处理器中管理共享资源。 确定两个或更多个线程的危险水平，其中线程的危险等级基于线程由于不可用的共享资源而遇到期限的潜在故障。 还确定与两个或更多个线程相关联的优先级，其中对于不能达到期限的线程而言，优先级高于不能接受的线程，并且对于不满足截止期限的线程，优先级较低。 至少基于与两个或多个线程相关联的两个或多个线程的确定的危险等级和优先级，来调度两个或更多个线程。

    HARDWARE MANAGED POWER COLLAPSE AND CLOCK WAKE-UP FOR MEMORY MANAGEMENT UNITS AND DISTRIBUTED VIRTUAL MEMORY NETWORKS
    2.
    发明申请
    HARDWARE MANAGED POWER COLLAPSE AND CLOCK WAKE-UP FOR MEMORY MANAGEMENT UNITS AND DISTRIBUTED VIRTUAL MEMORY NETWORKS 审中-公开
    硬件管理的电源崩溃和时钟唤醒内存管理单元和分布式虚拟内存网络

    公开(公告)号：WO2017172342A1

    公开(公告)日：2017-10-05

    申请号：PCT/US2017/022158

    申请日：2017-03-13

    Applicant: QUALCOMM INCORPORATED

    Inventor： PODAIMA, Jason Edward ,  AVOINNE, Christophe Denis Bernard ,  SOMASUNDARAM, Manokanthan ,  DENA, Sina ,  WIERCIENSKI, Paul Christopher John ,  RYCHLIK, Bohuslav ,  HALTER, Steven John ,  SUBRAMANIAM GANASAN, Jaya Prakash ,  RAMKUMAR, Myil ,  PAL, Dipti Ranjan

    IPC: G06F1/32

    Abstract: Methods and systems are disclosed for full-hardware management of power and clock domains related to a distributed virtual memory (DVM) network. An aspect includes transmitting, from a DVM initiator to a DVM network, a DVM operation, broadcasting, by the DVM network to a plurality of DVM targets, the DVM operation, and, based on the DVM operation being broadcasted to the plurality of DVM targets by the DVM network, performing one or more hardware optimizations comprising: turning on a clock domain coupled to the DVM network or a DVM target of the plurality of DVM targets that is a target of the DVM operation, increasing a frequency of the clock domain, turning on a power domain coupled to the DVM target based on the power domain being turned off, or terminating the DVM operation to the DVM target based on the DVM target being turned off.

    Abstract translation: 公开了用于与分布式虚拟存储器（DVM）网络相关的电力和时钟域的全硬件管理的方法和系统。 一个方面包括从DVM发起者向DVM网络发送DVM操作，由DVM网络向多个DVM目标广播DVM操作，并且基于DVM操作被广播到多个DVM目标 由所述DVM网络执行一个或多个硬件优化，所述一个或多个硬件优化包括：开启耦合到所述DVM网络的时钟域或作为所述DVM操作的目标的所述多个DVM目标中的DVM目标，增加所述时钟域的频率， 基于电源域被关闭来开启耦合到DVM目标的电源域，或者基于DVM目标被关闭来终止DVM目标的DVM操作。

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