公开(公告)号：EP3194989A1

公开(公告)日：2017-07-26

申请号：EP15835363.1

申请日：2015-08-26

Applicant: R&D Circuits Inc.

Inventor： WARWICK, Thomas P. ,  RUSSELL, James V.

IPC: G01R31/303

CPC classification number: H04L1/243 ,  G01R31/2851 ,  G01R31/31716 ,  G01R31/31937 ,  H04L1/205 ,  H04L41/24 ,  H04L43/50 ,  H05K1/0231 ,  H05K1/185 ,  H05K2201/10015

Abstract: A method and a structure with multiple implementations is provided that depends on the specific need, for placing (embedding) a serial loopback circuit of known design in a printed circuit board directly beneath the device under test. Micro-vias and traces connect components including transmitter components (TX) and receiver components (RX) that are formed into a loopback circuit for connection to a device under test (DUT). The connection is accomplished by a coupling capacitor with a shortest possible electrical length approximating a straight line between said components and said DUT and said distance is a length of said short straight line times a square root of 2 so that said receiver components are beneath the DUT.

Abstract translation: 提供了一种具有多种实施方式的方法和结构，其取决于具体需要，用于将已知设计的串行环回电路放置（嵌入）到被测设备正下方的印刷电路板中。 微通孔和迹线连接包括发送器组件（TX）和接收器组件（RX）的组件，这些组件被形成为用于连接到被测器件（DUT）的回送电路。 该连接通过耦合电容器来实现，该耦合电容器具有接近所述组件和所述DUT之间的直线的可能的最短电长度，并且所述距离是所述短直线的长度乘以2的平方根，使得所述接收器组件位于DUT下方 。

公开(公告)号：WO2016033146A1

公开(公告)日：2016-03-03

申请号：PCT/US2015/046870

申请日：2015-08-26

Applicant: R&D CIRCUITS, INC

Inventor： WARWICK, Thomas P. ,  RUSSELL, James V.

IPC: G01R31/303

CPC classification number: H04L1/243 ,  G01R31/2851 ,  G01R31/31716 ,  G01R31/31937 ,  H04L1/205 ,  H04L41/24 ,  H04L43/50 ,  H05K1/0231 ,  H05K1/185 ,  H05K2201/10015

Abstract: A method and a structure with multiple implementations is provided that depends on the specific need, for placing (embedding) a serial ioopback circuit of known design in a printed circuit board directly beneath the device under test. Micro- vias and traces connect components including transmitter components (TX) and receiver components (RX) that are formed into a Ioopback circuit for connection to a device under test (DUT). The connection is accomplished by a coupling capacitor with a shortest possible electrical length approximating a straight line between said components and said DUT and said distance is a length of said short straight line times a square root of 2 so that said receiver components are beneath the DUT.

Abstract translation: 提供了具有多个实现的方法和结构，其取决于具体需要，将已知设计的串行回波电路放置（嵌入）在正在被测器件正下方的印刷电路板中。 微通道和迹线连接组件，包括形成为Ioopback电路的发射器组件（TX）和接收器组件（RX），用于连接到被测设备（DUT）。 该连接由耦合电容器实现，其具有近似于所述部件和所述DUT之间的直线的最短电长度，并且所述距离是所述短直线的长度乘以2的平方根，使得所述接收器部件在DUT下方 。