公开(公告)号：EP0550291B1

公开(公告)日：1998-04-15

申请号：EP92311906.9

申请日：1992-12-31

Applicant: RAYTHEON COMPANY

Inventor： Bianchini, Michael J. ,  Chiesa, John A. ,  Michalik, Richard A. ,  Mistler, Joanne

IPC: H03L7/04

CPC classification number: H03L7/04

公开(公告)号：EP0393975A1

公开(公告)日：1990-10-24

申请号：EP90304088.9

申请日：1990-04-17

Applicant: RAYTHEON COMPANY

Inventor： Waterman, Raymond C., Jr. ,  Chiesa, John A. ,  Galani, Zvi

IPC: H03L7/22

CPC classification number: H03L7/23

Abstract: A multiple feedback loop frequency synthesizer (100) is fed by reference frequency signals (f R1 ,f R2 ), the frequency of such reference frequency signals being greater than the desired frequency separation provided by the synthesizer. With such arrangement, because the bandwidth of each of the feedback loops (102, 104) must be less than the frequency of the reference frequency signal fed to such loop, achievement of frequency separation less than the frequency of either one of the reference frequencies enables each of the feedback loops (102, 104) to have increased bandwidth and hence reduced frequency switching times and increased noise suppression. A single frequency offset generator (114) supplies an offset frequency (f os1 ) to a mixer (112) in one loop (104) in which the mixer output is divided by N for comparison in a phase/frequency detector (126) with one reference frequency (f R2 ). The output (f os2 ) of this loop (104) is used as the offset in the other, similar loop (102).

Abstract translation: 多反馈回路频率合成器（100）由参考频率信号（fR1，fR2）馈送，这种参考频率信号的频率大于由合成器提供的期望频率间隔。 通过这样的布置，由于每个反馈回路（102,104）的带宽必须小于馈送到这种回路的参考频率信号的频率，所以实现小于参考频率中的任何一个频率的频率间隔使得能够 每个反馈回路（102,104）具有增加的带宽并因此降低频率切换时间和增加的噪声抑制。 单个频率偏移发生器（114）在一个环路（104）中向混频器（112）提供偏移频率（fos1），其中混频器输出被N除以在相位/频率检测器（126）中具有一个参考 频率（fR2）。 该循环（104）的输出（fos2）用作另一个类似循环（102）中的偏移量。

公开(公告)号：EP0369660A2

公开(公告)日：1990-05-23

申请号：EP89311439.7

申请日：1989-11-06

Applicant: RAYTHEON COMPANY

Inventor： Galani, Zvi ,  Skinner, Malcolm E. ,  Chiesa, John A.

IPC: H03L7/185 ,  H03L7/107

CPC classification number: H03L7/10 ,  H03L7/185

Abstract: A phase lock/frequency control loop includes a voltage-­controlled oscillator (10) operating within a predetermined microwave frequency band and phase-locked to a reference oscillator (24) operating at a reference frequency below microwave frequencies. An offset loop signal is developed by an offset mixer (12) heterodyning the voltage-controlled oscillator (10) output signal with an offset microwave signal from an offset generator (14) whose frequency is located at the center of the predetermined microwave frequency band of the voltage controlled oscillator (10) to form a signal at an intermediate frequency (I.F.) within the frequency range of a programmable digital frequency divider (20). A phase/frequency detector (26) produces an error signal having a magnitude representative of the difference between the output from the divider (20) and a reference signal from a reference oscillator (24). The polarities of the error signal supplied, through an amplifier (30) and filter (32) to the voltage controlled oscillator (10) are set in accordance with whether the frequency commanded by a decoder (22) controlling the divider (20) is above or below the offset frequency. The signal frequency offset technique increases the frequency range of the indirect frequency synthesizer to twice the highest operating frequency of the programmable digital frequency divider.

Abstract translation: 锁相/频率控制回路包括在预定的微波频带内工作的压控振荡器（10），并锁相到以低于微波频率的参考频率工作的参考振荡器（24）。 偏移混合器（12）通过偏置混频器（12）来开发偏移混频器（12），该偏移混频器（12）利用来自偏移发生器（14）的偏移微波信号来对压控振荡器（10）输出信号进行外差，该偏移发生器（14）的频率位于预定微波频带的中心 所述压控振荡器（10）在可编程数字分频器（20）的频率范围内形成中频（IF）的信号。 相位/频率检测器（26）产生具有表示来自分频器（20）的输出与来自参考振荡器（24）的参考信号之间的差的幅度的误差信号。 根据由控制分频器（20）的解码器（22）指令的频率是否高于，通过放大器（30）和滤波器（32）提供给压控振荡器（10）的误差信号的极性被设定 或低于偏移频率。 信号频率偏移技术将间接频率合成器的频率范围提高到可编程数字分频器的最高工作频率的两倍。

公开(公告)号：EP0550291A1

公开(公告)日：1993-07-07

申请号：EP92311906.9

申请日：1992-12-31

Applicant: RAYTHEON COMPANY

Inventor： Bianchini, Michael J. ,  Chiesa, John A. ,  Michalik, Richard A. ,  Mistler, Joanne

IPC: H03L7/04

CPC classification number: H03L7/04

Abstract: A microwave oscillator (10) includes an oscillator (12) having an output and a control port (44) and,a feedback circuit (20) disposed between the output and the control port (44). The feedback circuit (20) includes a modulated laser (30) having an input responsive to a portion (16) of a signal from the output of the oscillator (12), and a photo detector (34) having an input responsive to an output signal from the modulated laser (30) delayed (32) by a predetermined amount of time. A detector (28) has a first input responsive to the output of the photo detector (34), a second input responsive to a portion of the output signal from the oscillator (12) shifted (26) in phase to be in phase quadrature with the signal at the first input of the detector (28). The output of the detector (28) is coupled to the control port (44) of the oscillator (12). The output signal from the detector (28) is only zero when there is no difference between the phase shifted signal from the phase shifter (26) and the delayed signal from the photo detector (34).

Abstract translation: 微波振荡器（10）包括具有输出和控制端口（44）的振荡器（12）和设置在输出端和控制端口（44）之间的反馈电路（20）。 反馈电路（20）包括调制激光器（30），其具有响应于来自振荡器（12）的输出的信号的一部分（16）的响应，以及光电检测器（34），其响应于输出 来自调制激光器（30）的信号被延迟（32）预定的时间量。 检测器（28）具有响应于光电检测器（34）的输出的第一输入端，响应于来自振荡器（12）的输出信号的一部分相位移相（26）的相位正交的第二输入端与 在检测器（28）的第一输入处的信号。 检测器（28）的输出耦合到振荡器（12）的控制端口（44）。 当来自移相器（26）的相移信号与来自光检测器（34）的延迟信号之间没有差异时，来自检测器（28）的输出信号仅为零。

公开(公告)号：EP0369660A3

公开(公告)日：1991-04-10

申请号：EP89311439.7

申请日：1989-11-06

Applicant: RAYTHEON COMPANY

Inventor： Galani, Zvi ,  Skinner, Malcolm E. ,  Chiesa, John A.

IPC: H03L7/185 ,  H03L7/107

CPC classification number: H03L7/10 ,  H03L7/185

Abstract: A phase lock/frequency control loop includes a voltage-­controlled oscillator (10) operating within a predetermined microwave frequency band and phase-locked to a reference oscillator (24) operating at a reference frequency below microwave frequencies. An offset loop signal is developed by an offset mixer (12) heterodyning the voltage-controlled oscillator (10) output signal with an offset microwave signal from an offset generator (14) whose frequency is located at the center of the predetermined microwave frequency band of the voltage controlled oscillator (10) to form a signal at an intermediate frequency (I.F.) within the frequency range of a programmable digital frequency divider (20). A phase/frequency detector (26) produces an error signal having a magnitude representative of the difference between the output from the divider (20) and a reference signal from a reference oscillator (24). The polarities of the error signal supplied, through an amplifier (30) and filter (32) to the voltage controlled oscillator (10) are set in accordance with whether the frequency commanded by a decoder (22) controlling the divider (20) is above or below the offset frequency. The signal frequency offset technique increases the frequency range of the indirect frequency synthesizer to twice the highest operating frequency of the programmable digital frequency divider.