Abstract:
A gain controlled amplifier system suitable for use as an intermediate frequency television amplifier and adapted for construction in integrated circuit form. A gain controllable cascode amplifier arrangement includes a relatively high maximum gain, common emitter transistor coupled to one emitter of a double emitter, common base output transistor. The arrangement also includes a degenerated common emitter transistor having a smaller collector to substrate capacitance than that of the first common emitter transistor. The degenerated transistor is coupled to the second emitter of the output transistor. AGC and signals are supplied to the two common emitter transistors via an emitter follower. A feedback loop includes the resistor of the follower and is coupled to the inputs of the common emitter transistors to maintain fixed bias thereat upon reception of intermediate level signals and consequent cut off of the first common emitter transistor. The emitter follower acts as a gain control stage and ultimately as a varactor attenuator for high level signals.
Abstract:
A source of keying pulses which occur in time coincidence with the synchronizing pulse components of a video wave is coupled to the input circuit of an automatic gain control (AGC) transistor. The keying pulses are of a polarity to drive the AGC transistor into conduction to adjust the charge on a capacitor in AGC circuits connected in an output circuit of the transistor. Second and third transistors are connected across the input circuit to control the amplitude of the keying pulses applied to the AGC transistor. The normally conducting second transistor is driven by the video wave, and is responsive to the synchronizing pulse components above a predetermined amplitude, to cut off the second transistor and thereby permit keying pulses to develop across the input circuit and drive the AGC transistor into conduction. The third transistor conducts in response to impulse noise to attenuate the keying pulse, and thus substantially decrease the AGC system gain when impulse noise is present. Additional direct current sources are coupled to the AGC transistor under control of the second transistor to (1) prevent AGC lockout upon occurrence of sudden increases in received signal level under transient conditions and (2) speed the response of the AGC system under nonsynchronized, strong signal conditions.
Abstract:
A gain controlled amplifier is provided which is capable of handling a wide range of input signal levels without the need for input signal attenuation. A transistor is arranged in a common emitter amplifier configuration and includes a PIN diode as a controllable impedance in the emitter circuit. An input signal and a gain control voltage are applied at the base of the transistor. As the input signal level increases, the gain control voltage is decreased, causing an increase in the substantially resistive impedance of the PIN diode, which bears a constant relationship to the decreasing gain control voltage (i.e., a linear relationship on a semilog plot). The gain of the transistor amplifier is thereby reduced. At high input signal levels, the impedance of the PIN diode comprises a large resistive component in parallel with a large reactive (i.e., small capacitive) component at the emitter of the transistor, thereby affording substantial gain reduction. A novel PIN diode is provided for use in such a gain controlled amplifier, comprising a first localized region of high resistivity semiconductor material having a substantially planar surface. Second and third localized regions of one type conductivity are located in the high resistivity region adjacent to the surface. A fourth localized region of opposite type conductivity is located in the high resistivity region adjacent to the surface and intermediate the second and third localized regions, and is separated laterally from the first and second regions by zones of the high resistivity material.
Abstract:
A gain-controlled amplifier is provided having a broad range of gain control which is traversed by varying the collector impedance of a common emitter coupled amplifying transistor. The collector load impedance of the transistor includes a controlled resistance device having a base electrode coupled to the collector electrode of the amplifying transistor, an emitter electrode coupled to receive a variable gain controlling current and a collector electrode coupled to a point of reference potential. At signal frequencies, the base-to-emitter junction of the device acts as a resistance which varies inversely with the flow of gain controlling current through the collector-to-emitter path of the device. Varying the resistance of the base-to-emitter junction of the device varies the collector load impedance of the amplifying transistor, whereby the gain of the transistor is varied by changing its load line as a function of the A.C. resistivity of the device. The collector-to-emitter path of the device through which the gain controlling current flows is separate from the transistor biasing circuitry, and hence control of the device will not affect the D.C. biasing of the amplifying transistor.
Abstract:
A gain-controlled amplifier is provided having a broad range of gain control which is traversed by varying the collector impedance of a common emitter coupled amplifying transistor. The collector load impedance of the transistor includes a controlled resistance device having a base electrode coupled to the collector electrode of the amplifying transistor, an emitter electrode coupled to receive a variable gain controlling current and a collector electrode coupled to a point of reference potential. At signal frequencies, the base-to-emitter junction of the device acts as a resistance which varies inversely with the flow of gain controlling current through the collector-to-emitter path of the device. Varying the resistance of the base-to-emitter junction of the device varies the collector load impedance of the amplifying transistor, whereby the gain of the transistor is varied by changing its load line as a function of the A.C. resistivity of the device. The collector-to-emitter path of the device through which the gain controlling current flows is separate from the transistor biasing circuitry, and hence control of the device will not affect the D.C. biasing of the amplifying transistor.
Abstract:
Video is applied via a gain controlled IF amplifier (11) to a video detector (13) and amplifier (15). Sync and equalising pulses are fed from the amplifier to an active filter (21-26) and then to a comparator (30), which produces an output variation for changing an AGC voltage produced by generator (40) and AGC capacitor (41) if the pulse peaks exceed a threshold. The filter (21-26) delays and attenuated noise impulses, but can also cause noise impulses to remain above the threshold for a period of time defined by pulse stretching in the filter. A transistor (32) is responsive to a potential difference of predetermined sense and magnitude between the input and output of the filter to curtail the output variation of the comparator (30). Such a difference exists when a delayed leading edge of a noise pulse is present at the output of the filter and the trailing edge is at the input.
Abstract:
A gain controlled amplifier is provided which is capable of handling a wide range of input signal levels without the need for input signal attenuation. A transistor is arranged in a common emitter amplifier configuration and includes a PIN diode as a controllable impedance in the emitter circuit. An input signal and a gain control voltage are applied at the base of the transistor. As the input signal level increases, the gain control voltage is decreased, causing an increase in the substantially resistive impedance of the PIN diode, which bears a constant relationship to the decreasing gain control voltage (i.e., a linear relationship on a semilog plot). The gain of the transistor amplifier is thereby reduced. At high input signal levels, the impedance of the PIN diode comprises a large resistive component in parallel with a large reactive (i.e., small capacitive) component at the emitter of the transistor, thereby affording substantial gain reduction. A novel PIN diode is provided for use in such a gain controlled amplifier, comprising a first localized region of high resistivity semiconductor material having a substantially planar surface. Second and third localized regions of one type conductivity are located in the high resistivity region adjacent to the surface. A fourth localized region of opposite type conductivity is located in the high resistivity region adjacent to the surface and intermediate the second and third localized regions, and is separated laterally from the first and second regions by zones of the high resistivity material.