Gain controlled cascode-connected transistor amplifier
    3.
    发明授权
    Gain controlled cascode-connected transistor amplifier 失效
    增益控制的连接晶体管放大器

    公开(公告)号:US3673498A

    公开(公告)日:1972-06-27

    申请号:US3673498D

    申请日:1970-05-19

    Applicant: RCA CORP

    CPC classification number: H04N5/53 H03G3/3052

    Abstract: A gain controlled amplifier system suitable for use as an intermediate frequency television amplifier and adapted for construction in integrated circuit form. A gain controllable cascode amplifier arrangement includes a relatively high maximum gain, common emitter transistor coupled to one emitter of a double emitter, common base output transistor. The arrangement also includes a degenerated common emitter transistor having a smaller collector to substrate capacitance than that of the first common emitter transistor. The degenerated transistor is coupled to the second emitter of the output transistor. AGC and signals are supplied to the two common emitter transistors via an emitter follower. A feedback loop includes the resistor of the follower and is coupled to the inputs of the common emitter transistors to maintain fixed bias thereat upon reception of intermediate level signals and consequent cut off of the first common emitter transistor. The emitter follower acts as a gain control stage and ultimately as a varactor attenuator for high level signals.

    Abstract translation: 一种增益控制放大器系统,适用于中频电视放大器,适用于集成电路形式的结构。 增益可控共源共栅放大器布置包括相对较高的最大增益,耦合到双发射极的一个发射极,公共基极输出晶体管的公共发射极晶体管。 该布置还包括具有比第一公共发射极晶体管更小的集电极到衬底电容的退化的公共发射极晶体管。 退化的晶体管耦合到输出晶体管的第二发射极。 AGC和信号通过射极跟随器提供给两个公共发射极晶体管。 反馈回路包括跟随器的电阻器,并且耦合到公共发射极晶体管的输入端,以在接收到中间电平信号并随后切断第一公共发射极晶体管时保持固定偏置。 射极跟随器充当增益控制级,最终作为高电平信号的变容二极管衰减器。

    Noise protected agc circuit with amplitude control of flyback pulses
    4.
    发明授权
    Noise protected agc circuit with amplitude control of flyback pulses 失效
    噪声保护AGC电路,具有放大脉冲的幅度控制

    公开(公告)号:US3634620A

    公开(公告)日:1972-01-11

    申请号:US3634620D

    申请日:1970-05-20

    Applicant: RCA CORP

    CPC classification number: H03G3/3052 H04N5/21 H04N5/53

    Abstract: A source of keying pulses which occur in time coincidence with the synchronizing pulse components of a video wave is coupled to the input circuit of an automatic gain control (AGC) transistor. The keying pulses are of a polarity to drive the AGC transistor into conduction to adjust the charge on a capacitor in AGC circuits connected in an output circuit of the transistor. Second and third transistors are connected across the input circuit to control the amplitude of the keying pulses applied to the AGC transistor. The normally conducting second transistor is driven by the video wave, and is responsive to the synchronizing pulse components above a predetermined amplitude, to cut off the second transistor and thereby permit keying pulses to develop across the input circuit and drive the AGC transistor into conduction. The third transistor conducts in response to impulse noise to attenuate the keying pulse, and thus substantially decrease the AGC system gain when impulse noise is present. Additional direct current sources are coupled to the AGC transistor under control of the second transistor to (1) prevent AGC lockout upon occurrence of sudden increases in received signal level under transient conditions and (2) speed the response of the AGC system under nonsynchronized, strong signal conditions.

    Abstract translation: 与视频波的同步脉冲分量在时间上一致出现的键控脉冲源耦合到自动增益控制(AGC)晶体管的输入电路。 键控脉冲是极性的,以驱动AGC晶体管导通,以调节连接在晶体管的输出电路中的AGC电路中的电容器上的电荷。 第二和第三晶体管连接在输入电路两端,以控制施加到AGC晶体管的键控脉冲的幅度。 正常导通的第二晶体管由视频波驱动,并且响应于高于预定幅度的同步脉冲分量,以切断第二晶体管,从而允许键控脉冲跨越输入电路产生并驱动AGC晶体管导通。 第三晶体管响应于脉冲噪声导通以衰减键控脉冲,从而当存在脉冲噪声时大幅降低AGC系统增益。 额外的直流电源在第二晶体管的控制下耦合到AGC晶体管,以(1)在瞬态条件下发生接收信号电平突然增加时防止AGC锁定,以及(2)加速AGC系统在非同步强度 信号条件。

    6.
    发明专利
    未知

    公开(公告)号:FI75953B

    公开(公告)日:1988-04-29

    申请号:FI800709

    申请日:1980-03-07

    Applicant: RCA CORP

    Abstract: A gain controlled amplifier is provided which is capable of handling a wide range of input signal levels without the need for input signal attenuation. A transistor is arranged in a common emitter amplifier configuration and includes a PIN diode as a controllable impedance in the emitter circuit. An input signal and a gain control voltage are applied at the base of the transistor. As the input signal level increases, the gain control voltage is decreased, causing an increase in the substantially resistive impedance of the PIN diode, which bears a constant relationship to the decreasing gain control voltage (i.e., a linear relationship on a semilog plot). The gain of the transistor amplifier is thereby reduced. At high input signal levels, the impedance of the PIN diode comprises a large resistive component in parallel with a large reactive (i.e., small capacitive) component at the emitter of the transistor, thereby affording substantial gain reduction. A novel PIN diode is provided for use in such a gain controlled amplifier, comprising a first localized region of high resistivity semiconductor material having a substantially planar surface. Second and third localized regions of one type conductivity are located in the high resistivity region adjacent to the surface. A fourth localized region of opposite type conductivity is located in the high resistivity region adjacent to the surface and intermediate the second and third localized regions, and is separated laterally from the first and second regions by zones of the high resistivity material.

    7.
    发明专利
    未知

    公开(公告)号:FR2481539B1

    公开(公告)日:1987-03-20

    申请号:FR8108017

    申请日:1981-04-22

    Applicant: RCA CORP

    Abstract: A gain-controlled amplifier is provided having a broad range of gain control which is traversed by varying the collector impedance of a common emitter coupled amplifying transistor. The collector load impedance of the transistor includes a controlled resistance device having a base electrode coupled to the collector electrode of the amplifying transistor, an emitter electrode coupled to receive a variable gain controlling current and a collector electrode coupled to a point of reference potential. At signal frequencies, the base-to-emitter junction of the device acts as a resistance which varies inversely with the flow of gain controlling current through the collector-to-emitter path of the device. Varying the resistance of the base-to-emitter junction of the device varies the collector load impedance of the amplifying transistor, whereby the gain of the transistor is varied by changing its load line as a function of the A.C. resistivity of the device. The collector-to-emitter path of the device through which the gain controlling current flows is separate from the transistor biasing circuitry, and hence control of the device will not affect the D.C. biasing of the amplifying transistor.

    VARIABLE LOAD IMPEDANCE GAIN-CONTROLLED AMPLIFIER

    公开(公告)号:HK17487A

    公开(公告)日:1987-03-06

    申请号:HK17487

    申请日:1987-02-26

    Applicant: RCA CORP

    Abstract: A gain-controlled amplifier is provided having a broad range of gain control which is traversed by varying the collector impedance of a common emitter coupled amplifying transistor. The collector load impedance of the transistor includes a controlled resistance device having a base electrode coupled to the collector electrode of the amplifying transistor, an emitter electrode coupled to receive a variable gain controlling current and a collector electrode coupled to a point of reference potential. At signal frequencies, the base-to-emitter junction of the device acts as a resistance which varies inversely with the flow of gain controlling current through the collector-to-emitter path of the device. Varying the resistance of the base-to-emitter junction of the device varies the collector load impedance of the amplifying transistor, whereby the gain of the transistor is varied by changing its load line as a function of the A.C. resistivity of the device. The collector-to-emitter path of the device through which the gain controlling current flows is separate from the transistor biasing circuitry, and hence control of the device will not affect the D.C. biasing of the amplifying transistor.

    9.
    发明专利
    未知

    公开(公告)号:FI72627B

    公开(公告)日:1987-02-27

    申请号:FI821820

    申请日:1982-05-21

    Applicant: RCA CORP

    Abstract: Video is applied via a gain controlled IF amplifier (11) to a video detector (13) and amplifier (15). Sync and equalising pulses are fed from the amplifier to an active filter (21-26) and then to a comparator (30), which produces an output variation for changing an AGC voltage produced by generator (40) and AGC capacitor (41) if the pulse peaks exceed a threshold. The filter (21-26) delays and attenuated noise impulses, but can also cause noise impulses to remain above the threshold for a period of time defined by pulse stretching in the filter. A transistor (32) is responsive to a potential difference of predetermined sense and magnitude between the input and output of the filter to curtail the output variation of the comparator (30). Such a difference exists when a delayed leading edge of a noise pulse is present at the output of the filter and the trailing edge is at the input.

    10.
    发明专利
    未知

    公开(公告)号:IT1129644B

    公开(公告)日:1986-06-11

    申请号:IT2054980

    申请日:1980-03-12

    Applicant: RCA CORP

    Abstract: A gain controlled amplifier is provided which is capable of handling a wide range of input signal levels without the need for input signal attenuation. A transistor is arranged in a common emitter amplifier configuration and includes a PIN diode as a controllable impedance in the emitter circuit. An input signal and a gain control voltage are applied at the base of the transistor. As the input signal level increases, the gain control voltage is decreased, causing an increase in the substantially resistive impedance of the PIN diode, which bears a constant relationship to the decreasing gain control voltage (i.e., a linear relationship on a semilog plot). The gain of the transistor amplifier is thereby reduced. At high input signal levels, the impedance of the PIN diode comprises a large resistive component in parallel with a large reactive (i.e., small capacitive) component at the emitter of the transistor, thereby affording substantial gain reduction. A novel PIN diode is provided for use in such a gain controlled amplifier, comprising a first localized region of high resistivity semiconductor material having a substantially planar surface. Second and third localized regions of one type conductivity are located in the high resistivity region adjacent to the surface. A fourth localized region of opposite type conductivity is located in the high resistivity region adjacent to the surface and intermediate the second and third localized regions, and is separated laterally from the first and second regions by zones of the high resistivity material.

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