DUAL MODE DEFLECTIONSYNCHRONIZING SYSTEM

    公开(公告)号:KR800000118B1

    公开(公告)日:1980-03-07

    申请号:KR750000153

    申请日:1975-01-28

    Applicant: RCA CORP

    Abstract: In a synchronizing system, a mode switch(80) operates to a nonsynchronous mode of operation ; when external synchronizing signals are continuously applied to an internal synchronizing and prediction interval generator (50) which noise-free internal signals are generated; if the external signals are not applied to, only after being switched to a synchronous by a vertical synchronizing signal detector(70), and making the generator(50) synchronized to the external signals.

    Protection circuit
    2.
    发明授权
    Protection circuit 失效
    保护电路

    公开(公告)号:US3641361A

    公开(公告)日:1972-02-08

    申请号:US3641361D

    申请日:1970-12-03

    Applicant: RCA CORP

    CPC classification number: H03K4/64 H02H7/20 H03K4/085

    Abstract: A protection circuit limits the collector current of a transistor employed as a clamp-to-ground stage in the event the collector terminal of the transistor is accidentally short circuited during conduction to a low-impedance voltage source. The protection circuit includes a transistor which has its baseemitter junction coupled across the base-emitter junction of the clamping transistor and has a collector resistor chosen to provide a saturation current for the protection transistor which holds the base-emitter junction voltage at a level which limits the collector current of the clamping transistor.

    Abstract translation: 如果晶体管的集电极在导通到低阻抗电压源时意外短路,则保护电路会限制用作钳位到地电平的晶体管的集电极电流。 保护电路包括晶体管,其晶体管的基极 - 发射极结耦合在钳位晶体管的基极 - 发射极结之间,并且具有集电极电阻,其被选择为保护晶体管提供饱和电流,保护晶体管将基极 - 发射极结电压保持在一定水平 这限制了钳位晶体管的集电极电流。

    Signal translating stage providing direct voltage translation independent of supplied operating potential
    4.
    发明授权
    Signal translating stage providing direct voltage translation independent of supplied operating potential 失效
    提供独立操作电位的直接电压转换的信号转换阶段

    公开(公告)号:US3651347A

    公开(公告)日:1972-03-21

    申请号:US3651347D

    申请日:1970-09-28

    Applicant: RCA CORP

    CPC classification number: H03K19/01812 H03F3/347 H03F3/45071

    Abstract: A signal translating stage includes a transistor having base and emitter electrodes coupled in parallel with a PN-junction poled in the same direction as the base-emitter junction of the transistor. A first resistor couples the collector electrode of the transistor to a terminal supplying input signals referenced to a first direct current level, while a second resistor couples the base electrode of the transistor to the emitter electrode of a further transistor, the base electrode of which is coupled via a third resistor to the signal supply terminal. By selecting the resistance values of the first and second resistors to be substantially equal and by providing a signal bypass within the network so formed by these interconnections, an output signal will be developed at the collector electrode of the first mentioned transistor referenced to a second direct current level. Such second level is primarily dependent on the number of baseto-emitter offset voltages between the second and third resistors and independent of the value of the first direct current level.

    Abstract translation: 信号转换级包括晶体管,其具有与与晶体管的基极 - 发射极结方向相同方向极化的PN结并联耦合的基极和发射极。 第一电阻器将晶体管的集电极耦合到提供以第一直流电平为参考的输入信号的端子,而第二电阻器将晶体管的基极耦合到另一个晶体管的发射极,其基极为 通过第三电阻耦合到信号提供端。 通过选择第一和第二电阻器的电阻值基本上相等,并且通过在由这些互连形成的网络内提供信号旁路,将在第一个提到的晶体管的集电极处产生一个输出信号,以第二个直接 当前水平。 这样的第二电平主要取决于第二和第三电阻之间的基极到发射极偏移电压的数量,而与第一直流电平的值无关。

    Electrical circuit providing multiple v bias voltages
    5.
    发明授权
    Electrical circuit providing multiple v bias voltages 失效
    提供多个V偏置电压的电路

    公开(公告)号:US3651346A

    公开(公告)日:1972-03-21

    申请号:US3651346D

    申请日:1970-09-24

    Applicant: RCA CORP

    CPC classification number: G05F3/222 H03F1/302 H03F3/347 H03K19/01806

    Abstract: An electrical circuit includes a transistor having base and emitter electrodes coupled in parallel with a PN-junction poled in the same direction as the base-emitter junction of the transistor. A first resistor couples the collector electrode of the transistor to a direct voltage source, while second and third resistors serially couple the source to the transistor''s emitter electrode. The base electrode of the transistor is coupled to the junction of the second and third resistors, the resistance values of which are selected to provide a predetermined resistance ratio there-between. With the PN-junction then coupled across the third resistor, the resistance value of the first and second resistors are further selected substantially equal to provide a direct voltage output at the collector electrode of the transistor which is primarily dependent on the predetermined resistance ratio between the second and third resistors and independent of the value of the direct voltage source.

    Abstract translation: 电路包括晶体管,其具有与与晶体管的基极 - 发射极结方向相同方向极化的PN结并联耦合的基极和发射极。 第一电阻器将晶体管的集电极耦合到直流电压源,而第二和第三电阻器将源极串联耦合到晶体管的发射极电极。 晶体管的基极耦合到第二和第三电阻器的结,其电阻值被选择为在其之间提供预定的电阻比。 利用PN结连接在第三电阻器上,第一和第二电阻器的电阻值被进一步选择为基本上等于在晶体管的集电极处提供直流电压输出,其主要取决于晶体管的预定电阻比 第二和第三电阻,并且与直流电压源的值无关。

    Fm stereophonic receiver detection apparatus and disabling means
    6.
    发明授权
    Fm stereophonic receiver detection apparatus and disabling means 失效
    FM立体声接收机检测装置和消除装置

    公开(公告)号:US3707603A

    公开(公告)日:1972-12-26

    申请号:US3707603D

    申请日:1969-12-29

    Applicant: RCA CORP

    CPC classification number: H03D1/2227 H04B1/1646 H04N9/70

    Abstract: A detector for deriving stereophonic audio difference (L-R) signal from a stereophonic composite signal and matrix amplifier means coupled to the detector for combining the difference signals with audio sum (L+R) signals to produce left (L) and right (R) audio signals. Automatic switching means for transferring the system between monophonic and stereophonic reproduction modes is also provided. The system is adapted for fabrication in integrated circuit form.

    Abstract translation: 用于从立体声复合信号和矩阵放大器装置中导出立体声音频差(LR)信号的检测器,耦合到检测器,用于将差信号与音频和(L + R)信号组合以产生左(L)和右(R) 信号。 还提供了用于在单声道和立体声再现模式之间传送系统的自动切换装置。 该系统适用于以集成电路形式制造。

    Synchronous demodulator employing transistor base-emitter clamping action
    7.
    发明授权
    Synchronous demodulator employing transistor base-emitter clamping action 失效
    采用晶体管同步发生器钳位动作的同步解调器

    公开(公告)号:US3679982A

    公开(公告)日:1972-07-25

    申请号:US3679982D

    申请日:1970-11-13

    Applicant: RCA CORP

    CPC classification number: H03D1/229

    Abstract: Input voltage signals are coupled in common to the emitter electrodes of a pair of transistors arranged in a differential amplifier configuration, and are synchronously detected by switching voltage signals coupled to the respective transistor base electrodes. The coupling to the emitter electrodes is through an amplifier transistor having a base electrode to which current signals to be demodulated are applied, a collector electrode connected to the common electrodes of the differential pair, and an emitter electrode connected to a point of reference or ground potential.

    Abstract translation: 输入电压信号共同耦合到以差分放大器配置布置的一对晶体管的发射极电极,并且通过耦合到各个晶体管基极的开关电压信号同步地检测。 与发射极电极的耦合是通过放大晶体管,其具有施加要被解调的电流信号的基极,连接到差分对的公共电极的集电极和连接到参考点或地面的发射极 潜在。

    Transistor base biasing using semiconductor junctions
    8.
    发明授权
    Transistor base biasing using semiconductor junctions 失效
    使用半导体结的晶体管基极偏置

    公开(公告)号:US3903479A

    公开(公告)日:1975-09-02

    申请号:US43603974

    申请日:1974-01-24

    Applicant: RCA CORP

    CPC classification number: H03F3/3096 H03F1/302

    Abstract: A multiple base-emitter potential (VBE) supply is direct coupled via a semiconductor junction to the base electrode of a ''''grounded-emitter'''' amplifier transistor to provide forward bias to its base-emitter junction. The semiconductor junction functions as a resistance coupling element, coupling a source of input signal to the base-emitter junction of the amplifier transistor.

    Abstract translation: 多个基极 - 发射极电位(VBE)电源经由半导体结直接耦合到“接地 - 发射极”放大器晶体管的基极,以向其基极 - 发射极结提供正向偏压。 半导体结用作电阻耦合元件,将输入信号源耦合到放大器晶体管的基极 - 发射极结。

    Dual mode deflection synchronizing system
    9.
    发明授权
    Dual mode deflection synchronizing system 失效
    双模偏转同步系统

    公开(公告)号:US3899635A

    公开(公告)日:1975-08-12

    申请号:US43804774

    申请日:1974-01-30

    Applicant: RCA CORP

    CPC classification number: H04N5/12

    Abstract: A dual mode deflection synchronizing system includes a resettable counter which generates noise-free internal synchronizing signals and signals representative of the interval during which external vertical synchronizing signals should be received provided the counter is properly synchronized. A sync signal verification detector is coupled to the source of external vertical sync signals and to a mode switch so that if the external signals arrive during this prediction interval as determined by the sync signal verification detector the system continues to operate in a synchronized mode on its internally generated synchronizing signals. If the external signals do not arrive during this prediction interval, the mode switch switches the system into a non-synchronized mode. A vertical sync signal detector which is also coupled to the source of external sync signals and to the mode switch begins to search for an external signal which has the time duration characteristic of an authentic external synchronizing signal. Until such a signal is received, the system continues to be synchronized by internal synchronizing signals generated by the resettable counter. When such a signal is received, the vertical sync signal detector resets the counter to correct its synchronization with the received external vertical synchronizing signal and toggles the mode switch to return the system to its synchronized mode of operation.

    Abstract translation: 双模偏转同步系统包括可复位计数器,该计数器产生无噪声的内部同步信号和表示在计数器被正确同步的情况下应当接收外部垂直同步信号的间隔的信号。 同步信号验证检测器耦合到外部垂直同步信号源和模式开关,使得如果外部信号在由该同步信号验证检测器确定的该预测间隔期间到达,则系统在其同步模式下继续工作 内部产生的同步信号。 如果外部信号在该预测间隔期间未到达,则模式切换将系统切换到非同步模式。 也耦合到外部同步信号源和模式开关的垂直同步信号检测器开始搜索具有真实外部同步信号的持续时间特性的外部信号。 在接收到这样的信号之前,系统通过可复位计数器产生的内部同步信号继续同步。 当接收到这样的信号时,垂直同步信号检测器复位计数器以校正其与所接收的外部垂直同步信号的同步,并且切换模式开关以将系统返回到其同步操作模式。

    Electrically controlled attenuation and phase shift circuitry
    10.
    发明授权
    Electrically controlled attenuation and phase shift circuitry 失效
    电气控制衰减和相位移位电路

    公开(公告)号:US3649847A

    公开(公告)日:1972-03-14

    申请号:US3649847D

    申请日:1970-10-30

    Applicant: RCA CORP

    CPC classification number: H04N9/643 H03G1/0035 H03G1/0052 H03H11/20

    Abstract: Input signal current combined with a substantially constant direct current bias is coupled to the junction of the emitter electrode of a transistor biased in common base configuration and one electrode of a diode poled similarly to the base-emitter junction of the transistor. A variable direct current supply is coupled to the other electrode of the diode. The collector of the transistor provides an output signal current, the average value of which is complementary to the average current flow through the diode. An electrically controlled attenuator is thus provided. This attenuator mechanism can be used to regulate a reactive current flow in phase shift circuitry to afford electrically controlled phase shift networks. Such electrically controlled attenuation and phase shift circuitry is well suited for use in remotely controlled television receivers and lends itself to monolithic integrated circuit construction.

    Abstract translation: 与基本上恒定的直流偏压组合的输入信号电流被耦合到以公共基极配置偏置的晶体管的发射极的结和类似于晶体管的基极 - 发射极极极化的二极管的一个电极的结。 可变直流电源耦合到二极管的另一个电极。 晶体管的集电极提供输出信号电流,其平均值与通过二极管的平均电流互补。 因此提供了电控衰减器。 该衰减器机构可用于调节相移电路中的无功电流以提供电控相移网络。 这种电控衰减和相移电路非常适用于远程控制的电视接收机,并且适用于单片集成电路结构。

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