Abstract:
In a synchronizing system, a mode switch(80) operates to a nonsynchronous mode of operation ; when external synchronizing signals are continuously applied to an internal synchronizing and prediction interval generator (50) which noise-free internal signals are generated; if the external signals are not applied to, only after being switched to a synchronous by a vertical synchronizing signal detector(70), and making the generator(50) synchronized to the external signals.
Abstract:
A protection circuit limits the collector current of a transistor employed as a clamp-to-ground stage in the event the collector terminal of the transistor is accidentally short circuited during conduction to a low-impedance voltage source. The protection circuit includes a transistor which has its baseemitter junction coupled across the base-emitter junction of the clamping transistor and has a collector resistor chosen to provide a saturation current for the protection transistor which holds the base-emitter junction voltage at a level which limits the collector current of the clamping transistor.
Abstract:
A signal translating stage includes a transistor having base and emitter electrodes coupled in parallel with a PN-junction poled in the same direction as the base-emitter junction of the transistor. A first resistor couples the collector electrode of the transistor to a terminal supplying input signals referenced to a first direct current level, while a second resistor couples the base electrode of the transistor to the emitter electrode of a further transistor, the base electrode of which is coupled via a third resistor to the signal supply terminal. By selecting the resistance values of the first and second resistors to be substantially equal and by providing a signal bypass within the network so formed by these interconnections, an output signal will be developed at the collector electrode of the first mentioned transistor referenced to a second direct current level. Such second level is primarily dependent on the number of baseto-emitter offset voltages between the second and third resistors and independent of the value of the first direct current level.
Abstract:
An electrical circuit includes a transistor having base and emitter electrodes coupled in parallel with a PN-junction poled in the same direction as the base-emitter junction of the transistor. A first resistor couples the collector electrode of the transistor to a direct voltage source, while second and third resistors serially couple the source to the transistor''s emitter electrode. The base electrode of the transistor is coupled to the junction of the second and third resistors, the resistance values of which are selected to provide a predetermined resistance ratio there-between. With the PN-junction then coupled across the third resistor, the resistance value of the first and second resistors are further selected substantially equal to provide a direct voltage output at the collector electrode of the transistor which is primarily dependent on the predetermined resistance ratio between the second and third resistors and independent of the value of the direct voltage source.
Abstract:
A detector for deriving stereophonic audio difference (L-R) signal from a stereophonic composite signal and matrix amplifier means coupled to the detector for combining the difference signals with audio sum (L+R) signals to produce left (L) and right (R) audio signals. Automatic switching means for transferring the system between monophonic and stereophonic reproduction modes is also provided. The system is adapted for fabrication in integrated circuit form.
Abstract:
Input voltage signals are coupled in common to the emitter electrodes of a pair of transistors arranged in a differential amplifier configuration, and are synchronously detected by switching voltage signals coupled to the respective transistor base electrodes. The coupling to the emitter electrodes is through an amplifier transistor having a base electrode to which current signals to be demodulated are applied, a collector electrode connected to the common electrodes of the differential pair, and an emitter electrode connected to a point of reference or ground potential.
Abstract:
A multiple base-emitter potential (VBE) supply is direct coupled via a semiconductor junction to the base electrode of a ''''grounded-emitter'''' amplifier transistor to provide forward bias to its base-emitter junction. The semiconductor junction functions as a resistance coupling element, coupling a source of input signal to the base-emitter junction of the amplifier transistor.
Abstract:
A dual mode deflection synchronizing system includes a resettable counter which generates noise-free internal synchronizing signals and signals representative of the interval during which external vertical synchronizing signals should be received provided the counter is properly synchronized. A sync signal verification detector is coupled to the source of external vertical sync signals and to a mode switch so that if the external signals arrive during this prediction interval as determined by the sync signal verification detector the system continues to operate in a synchronized mode on its internally generated synchronizing signals. If the external signals do not arrive during this prediction interval, the mode switch switches the system into a non-synchronized mode. A vertical sync signal detector which is also coupled to the source of external sync signals and to the mode switch begins to search for an external signal which has the time duration characteristic of an authentic external synchronizing signal. Until such a signal is received, the system continues to be synchronized by internal synchronizing signals generated by the resettable counter. When such a signal is received, the vertical sync signal detector resets the counter to correct its synchronization with the received external vertical synchronizing signal and toggles the mode switch to return the system to its synchronized mode of operation.
Abstract:
Input signal current combined with a substantially constant direct current bias is coupled to the junction of the emitter electrode of a transistor biased in common base configuration and one electrode of a diode poled similarly to the base-emitter junction of the transistor. A variable direct current supply is coupled to the other electrode of the diode. The collector of the transistor provides an output signal current, the average value of which is complementary to the average current flow through the diode. An electrically controlled attenuator is thus provided. This attenuator mechanism can be used to regulate a reactive current flow in phase shift circuitry to afford electrically controlled phase shift networks. Such electrically controlled attenuation and phase shift circuitry is well suited for use in remotely controlled television receivers and lends itself to monolithic integrated circuit construction.