公开(公告)号：US20040171225A1

公开(公告)日：2004-09-02

申请号：US10795377

申请日：2004-03-09

Applicant: RENESAS TECHNOLOGY CORP.

Inventor： Motoshige Igarashi

IPC: H01L021/8238 ,  H01L021/336 ,  H01L021/3205 ,  H01L021/4763

CPC classification number: H01L21/26506 ,  H01L21/26586 ,  H01L21/28035 ,  H01L21/823842 ,  H01L29/4916 ,  H01L29/4925 ,  H01L29/665 ,  H01L29/6653

Abstract: A gate insulating film is formed on a semiconductor substrate, and a gate electrode is formed by deposition of semiconductor material on the gate insulating film. An amorphous layer is then formed along the surface of or inside the gate electrode, and side walls are formed on the gate electrode. Finally, impurities are implanted into the semiconductor substrate by ion implantation while the gate electrode and the side walls are used as masks.

Abstract translation: 在半导体衬底上形成栅极绝缘膜，并且通过在栅极绝缘膜上沉积半导体材料形成栅电极。 然后沿着栅电极的表面或内部形成非晶层，并且在栅电极上形成侧壁。 最后，通过离子注入将杂质注入到半导体衬底中，同时将栅电极和侧壁用作掩模。

公开(公告)号：US20040207098A1

公开(公告)日：2004-10-21

申请号：US10648223

申请日：2003-08-27

Applicant: Renesas Technology Corp.

Inventor： Motoshige Igarashi

IPC: H01L027/088

CPC classification number: H01L29/6656 ,  H01L21/28114 ,  H01L21/823456 ,  H01L21/823468 ,  H01L22/12 ,  H01L22/20 ,  H01L29/42376 ,  H01L29/7833 ,  Y10S257/90

Abstract: Gate electrodes (3) are formed on a semiconductor substrate (1), each with a gate insulating film (2) interposed therebetween. A pair of offset spacers (4) are respectively formed on opposite side faces of each of the gate insulating film (2) and the gate electrodes (3). Diffusion layers (5) are formed in the semiconductor substrate (1) on opposite sides of a portion of the semiconductor substrate (1) immediately under each of the gate electrodes (3), by ion implantation. While the gate electrodes (3) have various configurations such as a gate electrode having a rectangular section, an upwardly tapered gate electrode and a downwardly tapered gate electrode, respective configurations of the offset spacers (4) are adjusted so that lengths each obtained by adding the gate length of the gate electrode (3), which gate length extends on an interface between the gate insulating film (2) and the gate electrode (3), to a width of the pair of the offset spacers (4), which width extends on an interface between the offset spacers (4) and the semiconductor substrate (1), are substantially uniform.

Abstract translation: 在半导体基板（1）上形成有栅电极（3），每个栅极电极（3）均插入有栅极绝缘膜（2）。 在栅极绝缘膜（2）和栅电极（3）的相对侧面分别形成有一对偏置间隔物（4）。 通过离子注入在半导体衬底（1）内的半导体衬底（1）的每个栅电极（3）的正下方的相对侧的相对侧上的半导体衬底（1）中形成扩散层（5）。 虽然栅电极（3）具有各种结构，例如具有矩形截面的栅电极，向上锥形的栅电极和向下锥形的栅电极，但是调整偏置间隔物（4）的各个配置，使得通过添加 栅极电极（3）的栅极长度在栅极绝缘膜（2）和栅电极（3）之间的界面上延伸的栅极长度相对于一对偏移间隔物（4）的宽度，宽度 在偏置间隔物（4）和半导体衬底（1）之间的界面上延伸，基本均匀。