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公开(公告)号：BR9509044A
公开(公告)日：1997-12-30
申请号：BR9509044
申请日：1995-09-11
Applicant: ROSEMOUNT INC
Inventor： GOETZINGER CHARLES E , TETZLAFF DAVID E
Abstract: A calibrating system calibrates an analog-to-digital converter which has an integrator and first and second reference current sources. A quantity of charge is accumulated in the integrator. The quantity of charge is removed from the integrator by applying the first and second reference currents to the integrator for first and second time periods until the accumulated charge reaches a threshold level. The quantity of charge is reaccumulated in the integrator and again removed by applying the first and second reference currents for third and fourth time periods wherein the first and second time periods are different from the third and fourth time periods. The relative magnitude of the first and second reference currents is determined based on the first, second, third and fourth time periods.
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公开(公告)号：CA2282536A1
公开(公告)日：1998-08-27
申请号：CA2282536
申请日：1998-02-23
Applicant: ROSEMOUNT INC
Inventor： ROSS JAMES P , TETZLAFF DAVID E
Abstract: A transmitter (10) for use in a process control setting includes a sensor (18) adapted to couple to a process and provide a sensor output (19) related to a parameter of the process. A modulator (50) coupled to the sensor output (19) responsively provides a digital bit stream output (52) representative of the sensor output (19). A filter (54) provides a current decimation output. A comparator (56) compares a previous decimation output with the current decimation output. Circuitry (28) is provided for transmitting an output related to the parameter based upon the current decimation.
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Patent Agency Ranking
公开(公告)号：CA2201138A1
公开(公告)日：1996-04-04
申请号：CA2201138
申请日：1995-09-11
Applicant: ROSEMOUNT INC
Inventor： GOETZINGER CHARLES E , TETZLAFF DAVID E
Abstract: A calibrating system calibrates an analog-to-digital converter which has an integrator (20) and first and second reference current sources (IL, IS). A quantity of charge is accumulated in the integrator (20). The quantity of charge is removed from the integrator (20) by applying the first and second reference currents (IL, IS) to the integrator (20) for first and second time periods until the accumulated charge reaches a threshold level. The quantity of charge is reaccumulated in the integrator (20) and again removed by applying the first and second reference currents (IL, IS) for third and fourth time periods wherein the first and second time periods are different from the third and fourth time periods. The relative magnitude of the first and second reference currents (IL, IS) is determined based on the first, second, third and fourth time periods.
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公开(公告)号：BR9706799A
公开(公告)日：1999-07-20
申请号：BR9706799
申请日：1997-09-23
Applicant: ROSEMOUNT INC
Inventor： TETZLAFF DAVID E
Abstract: An apparatus for and method of serially transmitting a message between first and second devices coupled to a data or clock line in a process control device is disclosed. A first transition of the data or clock signal is generated during a signal cycle. A second transition of the signal is generated during the first signal cycle in order to control the duty cycle of the signal during the first signal cycle. If the duty cycle of the signal during the first signal cycle has a first value, then the first signal cycle is representative of a first data state transmitted between the first and second devices. If the duty cycle of the signal during the first signal cycle has a second value, then the first signal cycle is representative of a second data state transmitted between the first and second devices.
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公开(公告)号：CA2238719A1
公开(公告)日：1998-04-09
申请号：CA2238719
申请日：1997-09-23
Applicant: ROSEMOUNT INC
Inventor： TETZLAFF DAVID E
Abstract: An apparatus for and method of serially transmitting a message between first and second devices (302, 304) coupled to a data or clock line (310) in a process control device (10) is disclosed. A first transition (212) of the data or clock signal is generated during a signal cycle. A second transition (214) of the signal is generated during the first signal cycle in order to control the duty cycle of the signal during the first signal cycle. If the duty cycle of the signal during the first signal cycle has a first value, then the first signal cycle is representative of a first data state transmitted between the first and second devices (302, 304). If the duty cycle of the signal during the first signal cycle has a second value, then the first signal cycle is representative of a second data state transmitted between the first and second devices (302, 304).
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公开(公告)号：CA2238494A1
公开(公告)日：1998-04-09
申请号：CA2238494
申请日：1997-09-23
Applicant: ROSEMOUNT INC
Inventor： WARRIOR JOGESH , TETZLAFF DAVID E , MAALOUF GABRIEL A
IPC: G05B15/02 , G05B19/042 , G05B19/418 , G05B11/01 , G08C19/00
Abstract: The present invention includes a process control instrument (100) having an improved data bus protocol for facilitating communications between master and slave nodes. The process control instrument (100) includes a microprocessor (200) operating in accordance with the SPI data bus protocol, first and second peripheral devices (204, 206), and a data bus (220) coupled to the microprocessor and the first and second peripheral devices. The improved data bus protocol used in the process control instruments of the present invention provides numerous advantages such as reduced printed circuit board space requirements and greater interchangeability of peripheral and master node components.
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公开(公告)号：CA2238495A1
公开(公告)日：1998-04-02
申请号：CA2238495
申请日：1997-09-17
Applicant: ROSEMOUNT INC
Inventor： ANDERSON STEPHEN D , TETZLAFF DAVID E , SCHNAARE THEODORE H , JUNK BRIAN S , ORMAN MICHAEL A , JOHNSON THEODORE L
Abstract: A field instrument (10) includes an input circuit (26) having a transistor bridge rectifier (Q1, Q2, Q3, Q4) which is couplable to a power supply. The transistor bridge rectifier (Q1, Q2, Q3, Q4) is configured to provide power from the power supply to a remainder of the field instrument (10).
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