Abstract:
PROBLEM TO BE SOLVED: To reduce uneveness of a current in a light emitting diode(LED) so as to improve uniformity of luminance by composing picture element structure of NMOS transistors, a capacitor and the LED. SOLUTION: Picture element structure 300 is composed of five NMOS transistors 310-350, a capacitor 302 and an LED 304. A selection line 370 is connected to a gate of the transistor 350, and a data line 360 is connected to one terminal of the capacitor 302. An auto-zero line 380 is connected to a gate of the transistor 340, and a VDD line 390 is connected to the drains of the transistors 320, 220. One terminal of the capacitor 302 is connected to the source of the transistor 330 and the drains of the transistors 340, 350, and the sources of the transistors 310, 320 are connected to one terminal of the LED 304. With this constitution, unevenness of a current can be reduced in the LED 304.
Abstract:
PROBLEM TO BE SOLVED: To correct electric parameters of a TFT and an OLED and to generate an OLED current excellently determined thereby in a pixel array. SOLUTION: Each pixel block 1200 is connected to a detection pin (VDD/SENSE pin) 1210 at an end of a display. In normal display operation, the detection pin 1210 is connected to a VDD power supply through a transistor P1, but the detection pin is connected to a current detecting circuit 1334 through a transistor P2 during a measurement cycle. A measured current of each pixel block is gathered by an I/O device 1340, converted to a digital format, and saved for calibration of a data voltage. This saved information is used to correct a data voltage for coping with threshold voltage variation of the transistor and OLED turn-on voltage variation. COPYRIGHT: (C)2006,JPO&NCIPI
Abstract:
A row-select circuit (118) for an organic light emitting diode display (116) propagates a gating pulse through a shift register. This gating pulse is synchronized with a system clock signal and is used to selectively apply a plurality of broadcast control signals to a selected row of pixels on the display (116). The line scanning circuitry (118) is controlled to clear and autozero the pixels in the display (116) either on line at a time or the entire image frame at a time. According to another aspect of the invention, the clearing of a row of pixels in the display (116) is performed over several line intervals before the row is autozeroed and loaded with new values. According to yet another aspect of the invention, the broadcast control signals may be adapted to achieve the best performance for each display device.
Abstract:
A liquid crystal display pixel is presented that maintains voltage modulation capability across a liquid crystal display pixel while keeping sustainable voltages across the junctions of the gate transistor for fine semiconductor fabrication processes. In one embodiment of the present invention, a liquid crystal display pixel includes a first gate transistor and a second gate transistor coupled in series from a substrate of the liquid crystal display pixel to a driving voltage line. The configuration prevents unsustainable voltages from appearing across the junctions of any single gate transistor while maintaining voltage modulation across a liquid crystal. In a second embodiment of the present invention, a liquid crystal display pixel with frame store capability includes a further clamping transistor to prevent high transient voltage from appearing across the junctions of any single gate transistor. The configuration prevents unsustainable voltages from appearing across the junctions of any single gate transistor while maintaining voltage modulation across a liquid crystal.
Abstract:
A three electrode plasma display panel (PDP) operates in concurrent sustain (26) and addressing (24) periods, rather than separating the sustain and addressing periods (26 and 24). Because of this concurrent operation, a PDP with a brighter display is produced. Crosstalk between sustain electrodes and the column electrodes of non-selected rows is mitigated by implementing column voltages such that there is no difference in crosstalk brightness level in non-addressed pixels in the on state compared to non-addressed pixels in the off state. This is accomplished by choosing column voltages that are approximately symmetric about one-half of the sustain voltage.
Abstract:
A three electrode plasma display panel (PDP) operates in concurrent sustain and addressing periods, rather than separating the sustain and addressing periods. Because of this concurrent operation, a PDP with a brighter display is produced. Crosstalk between sustain electrodes and the column electrodes of non-selected rows is mitigated by implementing column voltages such that there is no difference in crosstalk brightness levels in non-addressed pixels in the on state compared to non-addressed pixels in the off state. This is accomplished by choosing column voltages that are approximately symmetric about one-half of the sustain voltage.
Abstract:
A row-select circuit (118) for an organic light emitting diode display (116) propagates a gating pulse through a shift register. This gating pulse is synchronized with a system clock signal and is used to selectively apply a plurality of broadcast control signals to a selected row of pixels on the display (116). The line scanning circuitry (118) is controlled to clear and autozero the pixels in the display (116) either on line at a time or the entire image frame at a time. According to another aspect of the invention, the clearing of a row of pixels in the display (116) is performed over several line intervals before the row is autozeroed and loaded with new values. According to yet another aspect of the invention, the broadcast control signals may be adapted to achieve the best performance for each display device.