Thin-film transistor circuitry
    1.
    发明申请
    Thin-film transistor circuitry 审中-公开
    薄膜晶体管电路

    公开(公告)号:WO0148822A3

    公开(公告)日:2002-04-25

    申请号:PCT/US0035501

    申请日:2000-12-28

    Applicant: SARNOFF CORP

    CPC classification number: H01L27/12 H01S5/042

    Abstract: A circuit design technique polysilicon thin-film transistor (TFT) circuitry produces circuits that are relatively less sensitive to threshold variations among the TFT's than circuits designed using conventional techniques. The circuit is designed such that thin-film transistors that are sensititve to threshold variations are made larger than other thin-film transistors in the circuitry to minimize threshold variations among similar transistors implemented in the circuit. In one embodiment, a pixel structure for an active matrix display device implemented in polysilicon includes two transistors, a select transistor and a drive transistor. The drive transistor in the pixel structure is a thin film metal oxide silicon (MOS) transistor that includes a gate to source capacitance sufficient to hold an electrical potential which keeps the transistor in a conducting state for an image field interval. One embodiment of the pixel structure includes only the select transistor and the drive transistor. The pixel storage capacitance is entirely realized by the gate to source capacitance of the drive transistor. Another embodiment of the pixel structure includes a capacitor which is much smaller than the capacitor of a conventional active matrix pixel structure. This capacitor holds the pixel in a non-illuminated state when the drive transistor is turned off. This pixel structure may be used with any display technology that uses an active matrix and stores image data on a capacitance in the pixel, including without limitation, organic light emitting diodes, electroluminescent devices, and inorganic light emitting diodes.

    LINE SCANNING CIRCUIT FOR A DUAL-MODE DISPLAY
    2.
    发明申请
    LINE SCANNING CIRCUIT FOR A DUAL-MODE DISPLAY 审中-公开
    用于双模式显示的线扫描电路

    公开(公告)号:WO0019476A3

    公开(公告)日:2000-07-27

    申请号:PCT/US9920217

    申请日:1999-09-02

    Applicant: SARNOFF CORP

    Abstract: A row-select circuit (118) for an organic light emitting diode display (116) propagates a gating pulse through a shift register. This gating pulse is synchronized with a system clock signal and is used to selectively apply a plurality of broadcast control signals to a selected row of pixels on the display (116). The line scanning circuitry (118) is controlled to clear and autozero the pixels in the display (116) either on line at a time or the entire image frame at a time. According to another aspect of the invention, the clearing of a row of pixels in the display (116) is performed over several line intervals before the row is autozeroed and loaded with new values. According to yet another aspect of the invention, the broadcast control signals may be adapted to achieve the best performance for each display device.

    Abstract translation: 用于有机发光二极管显示器(116)的行选择电路(118)通过移位寄存器传播选通脉冲。 该选通脉冲与系统时钟信号同步,并用于选择性地将多个广播控制信号施加到显示器(116)上的选定行像素。 线扫描电路(118)被控制以一次在线清除和自动调整显示器(116)中的像素或一次在整个图像帧处。 根据本发明的另一方面,在行被自动调整并加载新值之前,在几行间隔上执行显示器(116)中的一行像素的清除。 根据本发明的又一个方面,广播控制信号可以适合于为每个显示设备实现最佳性能。

Patent Agency Ranking