Abstract:
A control system is disclosed which varies the operation of consumer's devices to minimize influx currents across a power grid. Power consuming devices are scheduled to operate in accordance with varying pricing tiers. As customers schedule the operation of various devices and appliances in accordance with pricing tiers, when the tiers change, the current drain on the power grid increases significantly. Even increasing the strain on the power grid is the fact that the start-up current for electric motors is up to six times their normal operating current. When started, as electric motors place a heavy strain on a power grid, the power strain lead to the disruption of power to the very consumers requiring more power. The present invention randomizes the start up times of the controlled devices so as to minimize the strain of the power grid as each one comes on line.
Abstract:
A block phase estimator includes a phase averaging circuit. A first embodiment of the phase averaging circuit includes a phase differencing circuit coupled to an averager input, a first modulo circuit coupled to the phase differencing circuit, a filter coupled to the first modulo circuit, and a summation circuit having a positive input and a negative input, the positive input being coupled to the averager input, the negative input being coupled to the filter. The phase averaging circuit further includes a second modulo circuit coupled to the summation circuit. An alternative embodiment of the phase averaging circuit includes a delay line having a plurality of taps coupled to an averager input and a plurality of first subtractor circuits, a first input of each first subtractor circuit being coupled to the averager input, a second input of each first subtractor circuit being coupled to a corresponding tap of the plurality of taps. A plurality of first modulo circuits are coupled to the plurality of first subtractor circuits, each first modulo circuit being coupled to a corresponding first subtractor circuit. A summation circuit is coupled to all first modulo circuits, and a scaling circuit is coupled to the summation circuit. The phase averaging circuit further includes a second subtractor circuit, a first input of the second subtractor circuit being coupled to the averager input, a second input of the second substractor circuit being coupled to the scaling circuit.
Abstract:
Two additional structures for addition to the Digital Video Broadcasters (DVB) Service Information (SI) for implementation of the MPEG-2 Systems Standard (ISO/IEC 13818-1) are provided; the Logical Channel Table (LCT) and the Composite Channel Table (CCT). The LCT provides the mapping between a Logical Channel Number (LCN) representing a service and the transport stream (TSID)/program number (PN) on which the service can be found. LCT entries may designate either simple conventional channels or Composite Channels. The LCT contains a Composite Channel Indicator (CCI), which when set to "1", indicates that the selected channel is a composite channel. In this case, the LCT entry gives the home channel of the Composite Channel, which provides the CCT to the decoder so that the tuner can be retuned to the actual program designated in the CCT for current viewing. Each entry in the CCT associates a Composite Channel Number (CCN) with a LCN and represents the "present" definition for the composite channel. A simple LCN is used as a key to the LCT to determine the transport stream ID and program number (PN) for the service components in the usual way. As time progresses, the entry for a specific CCN will change; therefore, the CCN is used as a "pointer" to the LCN which is the currently active service for the composite channel. These tables work with conventional MPEG-2 service definitions to decode multi-service transport streams.
Abstract:
Video and audio data are prepared in the form of a packetized elementary stream having a header, a presentation time stamp, and the video itself. The packetized elementary stream is allocated into the payload section of one or more transport packets. Transport packets are usually 188 bits in length herein and include a synchronization block and prefix data followed by the payload data. The multiplex/encryptor (64) combines individual transport packets (62) into a frame of data (60).
Abstract:
A heat sink assembly includes a printed wiring board (20), a metal case (18) and a circuit package (10) containing a gallium arsenide field effect transistor heat dissipating circuit. The circuit package includes a metal slug (14) formed integrally with the circuit package, the heat dissipating circuit being bonded to an obverse surface of the metal slug. The printed wiring board includes first and second metal lands (22), the first metal land being disposed on an obverse surface of the printed wiring board, the second metal land being disposed on a reverse surface of the printed wiring board. A solder film is formed bonded to and thermally coupling a reverse surface of the metal slug to the first metal land, and a plurality of solder posts are formed, each post bonding to and thermally coupling the first metal land to the second metal land. The metal case is squeezed therebetween. At least one bolt (56) extends through a hole in the printed wiring board and into the metal case so as to squeeze together the metal case, the printed wiring board, the first and second metal lands and the grease film.
Abstract:
A method and apparatus for providing command and control of remote systems using low earth orbit satellite communications having a programmable transceiver apparatus for providing a two-way communications path between a remote user (10) and a control center (4) via a low earth orbit satellite (8) at frequencies below 1 GHz. The transceiver apparatus includes a transceiver for communicating with the low earth orbit satellite (8); an antenna coupled to the transceiver; at least one interface communicating signals between at least one external device (14) located at the remote user, wherein the transceiver apparatus is programmed to transmit data related to the external device (14) to the satellite (8) in response to a signal communicated to the transceiver via the low earth orbit satellite, an internal program of the transceiver or an alarm or exception signal generated by any of the external devices or the user.
Abstract:
A frequency synthesizer loop (200) includes a first voltage controlled oscillator (201) and a first divider circuit (202) for dividing a frequency of an output signal generated by the first voltage controlled oscillator (201) by a factor of N. The synthesizer loop (200) further includes a phase/frequency detector circuit (203), a loop filter circuit (204), a summing circuit (206), a feedforward amplifier (205), a second voltage controlled oscillator (207), and a second divider circuit (208), wherein the second divider circuit (208) divides a second output signal generated by the second voltage controlled oscillator (207) by a factor of M, and a microprocessor (210) varies the value of M to keep the first voltage in the middle of a range of the second voltage controlled oscillator (207).
Abstract:
An open area security system comprises an acoustic sensor array (111-1, ..., 111-m) capable of forming elevational and azimuthal beams, or comprises two such arrays separated by a predetermined distance. A camera (101-1, ..., 101-n) mounted in the vicinity of the arrays may be automatically directed toward a detected, sound-producing event. Event data may be prestored in memory (105) and the system may learn of the event's character as an emergency or non-emergency status. Triangulation and other computational techniques may be utilized to determine from the beams the location (x/y coordinates) of the event, thus allowing the camera to be focused and zoomed to capture high resolution images of the event.
Abstract:
An amplifier circuit for a cable access television line amplifier includes a first cascode amplifier (Q1, Q3) and a second cascode amplifier (Q2, Q4) coupled in a push-pull arrangement. An alternative amplifier circuit includes a first transimpedance amplifier (Q1) and a second transimpedance amplifier (Q2) coupled in a push-pull arrangement. The first transimpedance amplifier further includes a field effect transistor (Q3) as an active load so as to provide feedback and the second transimpedance amplifier further includes a field effect transistor (Q4) as an active load so as to provide feedback.
Abstract:
A system for controlling a device and for controlling access to broadcast information is disclosed. The system includes a first receiver for receiving utterances of a speaker, a second receiver for receiving vocabulary data defining a vocabulary of utterances, and a processor for executing a speech recognition algorithm using the received vocabulary data to recognize the utterances of the speaker and for controlling the device and the access to the broadcast information in accordance with the recognized utterances of the speaker.