1.
    发明专利
    未知

    公开(公告)号:DE69219975D1

    公开(公告)日:1997-07-03

    申请号:DE69219975

    申请日:1992-09-17

    Abstract: In an anti-ESD protective structure, especially designed for pins destined to reach below ground and/or above supply voltages, includes a pair of Zener diodes or lateral NPN structures with a resistive connection between base and emitter, connected in opposition among each other between the pin to be protected and a grounded substrate of the integrated circuit. An amplifying effect on the leakage current which is drawn/injected through the pin by the protective structure caused by the triggering of an intrinsic parasitic transistor is effectively eliminated by connecting a biasing element, such as a forward biased junction, between the node of interconnection between the two Zener orlateral NPN structures and a node of the integrated circuit biased with a voltage sufficiently high as to ensure, under any condition, a reverse biasing of the base-emitter junction of the parasitic transistor.

    2.
    发明专利
    未知

    公开(公告)号:DE69029271D1

    公开(公告)日:1997-01-09

    申请号:DE69029271

    申请日:1990-12-21

    Inventor: CANCLINI ATHOS

    Abstract: A circuit for protection from overvoltages of an external electrical connection pad of a circuit integrated in an n type conductivity epitaxial layer formed on a monocrystal semiconductor substrate, comprises a lateral integrated transistor having an emitter connected to said pad, a collector connected to ground and a base connected to said pad across a resistor, and an integrated Zener diode functionally connected between the base and the collector of said transistor.

    4.
    发明专利
    未知

    公开(公告)号:DE69219975T2

    公开(公告)日:1997-10-16

    申请号:DE69219975

    申请日:1992-09-17

    Abstract: In an anti-ESD protective structure, especially designed for pins destined to reach below ground and/or above supply voltages, includes a pair of Zener diodes or lateral NPN structures with a resistive connection between base and emitter, connected in opposition among each other between the pin to be protected and a grounded substrate of the integrated circuit. An amplifying effect on the leakage current which is drawn/injected through the pin by the protective structure caused by the triggering of an intrinsic parasitic transistor is effectively eliminated by connecting a biasing element, such as a forward biased junction, between the node of interconnection between the two Zener orlateral NPN structures and a node of the integrated circuit biased with a voltage sufficiently high as to ensure, under any condition, a reverse biasing of the base-emitter junction of the parasitic transistor.

    5.
    发明专利
    未知

    公开(公告)号:ITVA910030D0

    公开(公告)日:1991-09-12

    申请号:ITVA910030

    申请日:1991-09-12

    Abstract: In an anti-ESD protective structure, especially designed for pins destined to reach below ground and/or above supply voltages, includes a pair of Zener diodes or lateral NPN structures with a resistive connection between base and emitter, connected in opposition among each other between the pin to be protected and a grounded substrate of the integrated circuit. An amplifying effect on the leakage current which is drawn/injected through the pin by the protective structure caused by the triggering of an intrinsic parasitic transistor is effectively eliminated by connecting a biasing element, such as a forward biased junction, between the node of interconnection between the two Zener orlateral NPN structures and a node of the integrated circuit biased with a voltage sufficiently high as to ensure, under any condition, a reverse biasing of the base-emitter junction of the parasitic transistor.

    6.
    发明专利
    未知

    公开(公告)号:ITVA910029D0

    公开(公告)日:1991-09-12

    申请号:ITVA910029

    申请日:1991-09-12

    Inventor: CANCLINI ATHOS

    Abstract: An integrated protective structure provides protection from electrostatic discharges of structures to an integrated circuit functionally connected to a certain external pin. The protective structure is formed in a single epitaxial tub and includes a triggering Zener diode and a vertical bipolar transistor. The collector region of the vertical bipolar transistor is connected to the pin and constitutes also one of the two terminal regions of the triggering Zener. Around the emitter region and separated therefrom by the smallest distance feasible, is an annular region, having a heavier doping than the base region of the transistor formed with the purpose of intercepting the avalanche current of the Zener junction and distributing it in a uniform manner into the base region of the vertical transistor as well as acting as a shield for eventual electrons moving from the emitter region toward the breakdown junction. Optionally, a further emitter region, may be formed in front of the collector/cathode region and connected to the annular region in order to create a lateral bipolar transistor which triggers-on during an electrostatic discharge; thus, reducing the ohmic drop through the protective structure and the breakdown voltage.

    7.
    发明专利
    未知

    公开(公告)号:DE69220159T2

    公开(公告)日:1997-10-30

    申请号:DE69220159

    申请日:1992-09-11

    Inventor: CANCLINI ATHOS

    Abstract: An integrated protective structure provides protection from electrostatic discharges of structures to an integrated circuit functionally connected to a certain external pin. The protective structure is formed in a single epitaxial tub and includes a triggering Zener diode and a vertical bipolar transistor. The collector region of the vertical bipolar transistor is connected to the pin and constitutes also one of the two terminal regions of the triggering Zener. Around the emitter region and separated therefrom by the smallest distance feasible, is an annular region, having a heavier doping than the base region of the transistor formed with the purpose of intercepting the avalanche current of the Zener junction and distributing it in a uniform manner into the base region of the vertical transistor as well as acting as a shield for eventual electrons moving from the emitter region toward the breakdown junction. Optionally, a further emitter region, may be formed in front of the collector/cathode region and connected to the annular region in order to create a lateral bipolar transistor which triggers-on during an electrostatic discharge; thus, reducing the ohmic drop through the protective structure and the breakdown voltage.

    8.
    发明专利
    未知

    公开(公告)号:DE69220159D1

    公开(公告)日:1997-07-10

    申请号:DE69220159

    申请日:1992-09-11

    Inventor: CANCLINI ATHOS

    Abstract: An integrated protective structure provides protection from electrostatic discharges of structures to an integrated circuit functionally connected to a certain external pin. The protective structure is formed in a single epitaxial tub and includes a triggering Zener diode and a vertical bipolar transistor. The collector region of the vertical bipolar transistor is connected to the pin and constitutes also one of the two terminal regions of the triggering Zener. Around the emitter region and separated therefrom by the smallest distance feasible, is an annular region, having a heavier doping than the base region of the transistor formed with the purpose of intercepting the avalanche current of the Zener junction and distributing it in a uniform manner into the base region of the vertical transistor as well as acting as a shield for eventual electrons moving from the emitter region toward the breakdown junction. Optionally, a further emitter region, may be formed in front of the collector/cathode region and connected to the annular region in order to create a lateral bipolar transistor which triggers-on during an electrostatic discharge; thus, reducing the ohmic drop through the protective structure and the breakdown voltage.

    9.
    发明专利
    未知

    公开(公告)号:DE69029271T2

    公开(公告)日:1997-04-17

    申请号:DE69029271

    申请日:1990-12-21

    Inventor: CANCLINI ATHOS

    Abstract: A circuit for protection from overvoltages of an external electrical connection pad of a circuit integrated in an n type conductivity epitaxial layer formed on a monocrystal semiconductor substrate, comprises a lateral integrated transistor having an emitter connected to said pad, a collector connected to ground and a base connected to said pad across a resistor, and an integrated Zener diode functionally connected between the base and the collector of said transistor.

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