公开(公告)号：JPH10243658A

公开(公告)日：1998-09-11

申请号：JP19900897

申请日：1997-07-24

Applicant: SGS THOMSON MICROELECTRONICS

Inventor： DI GUARDO MARIO ,  D ANGELO GIUSEPPE ,  LO PRESTI MATTEO

IPC: G06F7/68 ,  H02M7/5395 ,  H02P27/08 ,  H03K7/08 ,  H02M7/48

Abstract: PROBLEM TO BE SOLVED: To handle the control signal of a power switching element by dividing is frequency of a basic memory scanning clock signal by the division value which is directed primarily from a look up table by a digital selection command and is increased by one. SOLUTION: An operation block includes a multiplier and a divider which divides frequency by (N+1), and also necessarily includes an auxiliary divider which performs the division by (N+1), being provided upstream of the divider, and a look up table which is operated in advance, using a numerical value n being decided by digital selection data, that is, the divisor n of the divider. The prescaling ratio which is stored in a memory and is the function of the number m of samples being constituted by dividing sine wave and is the factor of multiplication pertaining to the clock frequency Clk can be set in advance by a three-bit command. This way, the output of the prescaler becomes the basic scanning clock signal Clkm of a memory.